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Forschung 2018
(2018)
Simulation Based Approach for Reconfiguration and Ramp up Scenario Analysis in Factory Planning
(2022)
Structural changes in production entail a potential economic risk for manufacturing companies. It is necessary to identify a suitable strategy for the reconfiguration process and to continue to meet the demand during the change in the factory structure and ramp-up phase. A simulation offers the possibility to analyze different ramp-up scenarios for the factory structure and to select a suitable concept for the reconfiguration process. A discrete event simulation approach is presented that can be used to evaluate variants of structural changes and serves as a basis for deciding on a reconfiguration strategy. This approach is demonstrated using a specific production step of a plant producing hydrogen electrolyzers, the results and generalized conclusions are discussed.
Digital twins enable the digital representation of physical systems and provide comprehensive modelling and analysis capabilities. An online data exchange between the Digital twin and SAP is feasible, through integration of a transport control systems (SAP) via RESTful API. This interface allows decision making in resource allocation and furthermore the adaptation of the digital model if the real system changes. Despite the associated challenges in terms of data synchronisation, the integration has benefits such as a reduction in modelling effort and an increase in the lifetime of the digital twin. In the context of this work, the design of the interface between the simulation software and a SAP transport control system via RESTful API is described.
Current challenges in the planning and control of internal logistics systems are based on permanent changes in the requirements on the system, e.g., due to fluctuating order numbers or changes in their structure. For the representation and planning of in-house logistics processes, digital twins offer the possibility to verify different operational decisions such as predictive workforce scheduling. In this context, the quality of the results and their in-time presentation plays a decisive role. However, both target criteria are influenced by the detail-level of the digital representation. Based on a case study, this paper investigates the influence of the level of detail on the simulation runtime and result divergence to provide an evaluation for detail levels in the modelling of intralogistic transport systems.
Modern compute architectures often consist of multiple CPU cores to achieve their performance, as physical properties put a limit on the execution speed of a single processor. This trend is also visible in the embedded and real-time domain, where programmers are forced to parallelize their software to keep deadlines. Additionally, embedded systems rely increasingly on modular applications, that can easily be adapted to different system loads and hardware configurations.
To parallelize applications under these dynamic conditions, often dispatching frameworks like Threading Building Blocks (TBB) are used in the desktop and server segment. More recently, Embedded Multicore Building Blocks (EMB2) was developed as a task-based programming solution designed with the constraints of embedded systems in mind.
In this paper, we discuss how task-based programming fits such systems by analyzing scheduler implementation variants, with a focus on classic work-stealing and the libraries TBB and EMB2. Based on the state of the art we introduce a novel resource-trading concept that allows static memory allocation in a work-stealing runtime holding strict space and time bounds. We conduct benchmarks between an early prototype of the concept, TBB and EMB2, showing that resource-trading does not introduce additional runtime overheads, while unfortunately also not improving on execution time variances.
The enormous amounts of data modern real-time systems have to process lead to expensive, long-lasting calculations. In order to manage those computations in a timely manner, parallel task models have gained a lot of popularity lately. However, parallel programming can be very cumbersome and verbose. Other computationally intensive sectors have dealt with parallel computing for decades and have accumulated their experience in the development of parallel frameworks. Examples of well known parallel runtime systems are OpenMP, Intel Threading Building Blocks (TBB) and Microsoft Parallel Pattern Library (PPL). These runtime systems allow developers to enhance parallelism in their applications in a straightforward fashion. However, those parallel frameworks and the patternbased interfaces they provide might not be easily applicable in real-time systems. In this paper, we investigate the use of parallel programming frameworks in time-critical systems. On that account, we discuss considerations for the design of real-time applications that make use of such parallel runtime systems. Furthermore, we evaluate three library-based frameworks from different computing sectors, namely Intel Threading Building Blocks, Embedded Multicore Building Blocks (EMBB) and High Performance ParalleX (HPX), by conducting benchmarks of various parallel algorithms on an embedded multicore architecture.
Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems.
In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture.
Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems.
In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture.