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The finite element simulation program COMSOL Multiphysics® was used to simulate the emission efficiency of a silicon tip electron source in triode configuration for different geometries and electrode potentials. The simulation predicts a maximum emission efficiency of 84% for an optimized structure. In a second simulation a gate electrode was concentrically arranged above a single CNT column. Here, the efficiency was simulated as a function of gate hole geometry, electrode potentials and distances between the electrodes. The simulation shows that a conical shape of the gate hole results in an efficiency up to nearly 100%.
Silicon-based cathodes with precisely aligned field emitter arrays of sharp tips applicable for miniaturized electron sources were successfully fabricated and characterized. This was made possible by an improved fabrication process using wet thermal oxidation, wet etching, and reactive-ion etching steps with adjustable anisotropy. As substrate materials, both p-doped silicon and n-doped silicon were used. The cathode chips contain about 3 × 10 5 Si tips/cm 2 in a triangular array with tip heights of 2.5 μm, tip radii of less than 30 nm, and spacing of 20 μm. Well-aligned field emission (FE) and excellent homogeneity from all tips (i.e., 100% efficiency) and maximum stable currents of typically 0.1 μA (0.6 μA) for p (n)-type Si were reproducibly achieved. The current-voltage characteristics of the p-Si tips exhibit the expected saturation at around 10 nA with around ten times better current stability, whereas the n-Si tips show the usual Fowler-Nordheim behavior. Additional coating of the Si tips with 5-nm Cr and 10-nm Au layers resulted in improved stability and at least five times higher average FE current limits (about 3 μA) at about 30% higher operation voltage.
The electron current from field-emitting B-doped Si-tip arrays under illumination was studied. An improved cathode design with a patch of 271 tips yielded a reproducible cathode current between 0.2-2000 nA in the electric field range of 3.8-6.6 V/μm. The plateau in the Fowler-Nordheim plot shows the actual carrier depletion and leads to a very stable emission at ~1 μA with a current noise of less than 3.3 %. Color-filtered halogen lamp illumination was used to investigate the photo-sensitivity of the saturation current. The intensity-normalized current switching ratio increases nonlinearly with the photon energy. This hints either for secondary generation in the conduction band or deeper valence band excitation. The first is supported by a rough estimation of the quantum efficiency. Further experiments with a tunable laser and electron spectroscopy are planned.
In order to optimize our field-emitting silicon structures, the influence of geometric parameters like aspect ratio, aperture angle and curvature on the field enhancement factor was investigated by finite element simulations. A universal geometric model consisting of a rounded triangle and elliptic curvatures was taken for modeling a variety of different silicon tip as well as ridge structures. Whereas, a high dependency of the field enhancement on the aperture angle was found, the simulations show that the elliptic curvature affects the field enhancement only marginal.
We have fabricated a test chip with various hexagonal arrays of B-doped Si tips (height ~ 3 μm, apex radius <; 30 nm, number 1-4447, resistivity 4 Ωcm, 100 orientation) in triangular arrangement (pitch 10 μm, density 1.16×10 6 cm -2 ) in order to systematically investigate the field emission current scaling with the number N of tips. Regulated voltage scans for 1 nA revealed rather efficient emission from nearly all tips of the arrays at an average field of 15 V/μm. The expected current plateau was always obtained at fields around 20 V/μm, but its width strongly increased with N. In this carrier depletion range, the single tip provided a much higher stability (<; 5%) of the current (2-3 nA) than at lower (>; 50 %) and higher currents (>; 30%). Integral current measurements of the hexagonal arrays resulted in a statistically improved current stability (<; 1%) but only a weak increase of the total current with N 0.28 yet. These results will be discussed with respect to the remaining inhomogeneity of the tips.
Fabrication and simulation of silicon structures with high aspect ratio for field emission devices
(2014)
To obtain higher field enhancement factors of Si-tip structures, we present an improved fabrication process utilizing reactive-ion etching (RIE) with an inductively coupled plasma (ICP). In our design, a pillar under the tips is realized by a combination of RIE with ICP. With adjusted power settings (≈ 240 W) and step times (<; 5 s), vertical slopes with a low roughness of approximately 10 nm to 20 nm are possible. The remaining silicon is oxidized thermally to sharpen the emitters. A final tip radius of R <; 20 nm is obtained for the tips of the emitters. The pillar height HP can be mainly adjusted by the duration of the ICP-etching step. A total emitter height of H ≈ 6 μm with a pillar height of HP ≈ 5 μm is achieved. Simulations with COMSOL Multiphysics® are applied to calculate the field enhancement factor β. A two-dimensional model is used in rotational symmetry. In addition to the previous model, a pillar with a varying diameter ØP and height HP is added. A conventional emitter (H = 1 μm and R = 20 nm) placed on a pillar of the height HP ≈ 5 μm approximately results in a three times higher β-factor (β≈ 105). By decreasing the diameter ØP a slight increase of the β-factor is observed. However, the aspect ratio of the emitter mainly influences on the β-factor.
The homogeneity of emitters is very important for the performance of field emission (FE) devices. Reactive-ion etching (RIE) and oxidation have significant influences on the geometry of silicon tips. The RIE influences mainly the anisotropy of the emitters. Pressure has a strong impact on the anisotropic factor. Reducing the pressure results in a higher anisotropy, but the etch rate is also lower. A longer time of etching compensates this effect. Furthermore an improvement of homogeneity was observed. The impact of uprating is quite low for the anisotropic factor, but significant for the homogeneity. At low power the height and undercut of the emitters are more constant over the whole wafer. The oxidation itself is very homogeneous and has no observable effect on further variation of the homogeneity. This modified fabrication process allows solving the problem of inhomogeneity of previous field emission arrays.
Precisely aligned arrays of sharp tip structures on top of elongated pillars were realized by using an improved fabrication process including an additional inductively-coupled-plasma reactive-ion etching step. Arrays of n-type and p-type silicon with 271 tips have been fabricated and investigated. Those structures have a total height of 5–6 µm and apex radii less than 20nm. Integral field emission measurements of the arrays yielded low onset-fields in the range of 8–12V=µm and field enhancement factors between 300 and 700. The I-E curves of n-type structures showed the usual Fowler-Nordheim behaviour, whereas p-type structures revealed a significant saturation region due to the limited number of electrons in the conduction band and a further carrier depletion effect caused by the pillar. The maximum integral current in the saturation region was 150 nA at fields above 30V=µm. An excellent stability of the emission current of less than ± 2% fluctuation was observed in the saturation region. For n-type Si a maximum integral current of 10 µA at 24V=µm and an average current stability with a fluctuation of ± 50% were measured.
We report on the simulation and fabrication of nanostructured silicon surfaces for field emission (FE) applications, e.g. ionization sensors and x-ray tubes. For the design and optimization of field-emitting silicon structures, the influence of the geometric parameters like tip height, apex radius, aperture angle and curvature shape on the field enhancement factor was investigated by simulation using finite element method. A universal geometric model which describes the real geometry of our silicon structures sufficiently accurate was taken for modeling a variety of different silicon tip structures as well as ridge structures. While a high dependency of the field enhancement on the aspect ratio and the aperture angle was found, the simulations show that the elliptic curvature affects the field enhancement only marginally. Finally, an improved process for fabrication of such silicon structures on n-type as well as p-type substrate is described, using reactive ion etching with adjustable anisotropy, wet thermal oxidation and wet etching.
The homogeneity of emitters is very important for the performance of field emission (FE) devices. Reactive-ion etching (RIE) and oxidation have significant influences on the geometry of silicon tips. The RIE influences mainly the anisotropy of the emitters. Pressure has a strong impact on the anisotropic factor. Reducing the pressure results in a higher anisotropy, but the etch rate is also lower. A longer time of etching compensates this effect. Furthermore an improvement of homogeneity was observed. The impact of uprating is quite low for the anisotropic factor, but significant for the homogeneity. At low power the height and undercut of the emitters are more constant over the whole wafer. The oxidation itself is very homogeneous and has no observable effect on further variation of the homogeneity. This modified fabrication process allows solving the problem of inhomogeneity of previous field emission arrays.