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A novel integrated cooling packaging for high power density semiconductors

  • This work investigates a packaging solution for high power density semiconductors (> 200 W/cm 2), allowing for a dramatic reduction in size and complexity of power electronics modules. The multiple layers in standard packaging structures degrade the cooling efficiency due as they lengthen the path between dies and heatsinks. Here, we reduce the layer count by merging the ceramic substrate and the heat exchanger in a single part. CFD simulations and experimental validation are performed on a single-chip cooling packaging, and demonstrate a 10-20 % reduction in thermal resistance over more traditional cooling solutions.

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Metadaten
Author:Amin Salim Obaid Al-Hinaai, Till HuesgenORCiD, Cyril Buttay, Richard Zeitler, Daniela Meyer
DOI:https://doi.org/10.1109/THERMINIC57263.2022.9950643
Parent Title (English):28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC 2022), Sep 2022, Dublin, Ireland
Document Type:conference proceeding (article)
Conference:28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC 2022), September 28-30,2022, Dublin, Ireland
Language:English
Year of first Publication:2022
Tag:ARCHIVE
Number of pages:6 Seiten
First Page:1
Last Page:6
Institutes:Fakultät Elektrotechnik
Dewey Decimal Classification:6 Technik, Medizin, angewandte Wissenschaften / 60 Technik
Research focus:FSP1: Energie
FSP3: Produktion
Publication Lists:Huesgen, Till
Al-Hinaai, Amin
Research Project:ARCHIVE – ARchitecture Ceramic for HIgh Voltage power Electronics
Publication reviewed:begutachtet
Release Date:2022/11/14
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