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Self-testing and self-repairing embedded processors: techniques for statically scheduled superscalar architectures

  • This thesis introduces a comprehensive approach for making a particular class of embedded processors self-testing and self-repairing, such that a limited amount of permanent hardware faults that occur during the lifetime of these processors in the field will not prohibit the functional behavior of the user application running on the processor. The presented concepts all use redundant hardware, but the techniques used for administrating the hardware-redundancy range from hardware-based methods over hybrid methods to pure software-based methods, whereby the focus is on the latter ones. The proposed methods will be demonstrated by using a processor that is well designed for diagnostic self-test and self-repair purposes. This will also highlight some architectural properties of such a processor, which are beneficial for performing a software-based self-test and self-repair process. Chapter 1 is an introduction to the field of dependable systems and fault tolerance. Fundamental terms and notations, which are used throughout this thesisThis thesis introduces a comprehensive approach for making a particular class of embedded processors self-testing and self-repairing, such that a limited amount of permanent hardware faults that occur during the lifetime of these processors in the field will not prohibit the functional behavior of the user application running on the processor. The presented concepts all use redundant hardware, but the techniques used for administrating the hardware-redundancy range from hardware-based methods over hybrid methods to pure software-based methods, whereby the focus is on the latter ones. The proposed methods will be demonstrated by using a processor that is well designed for diagnostic self-test and self-repair purposes. This will also highlight some architectural properties of such a processor, which are beneficial for performing a software-based self-test and self-repair process. Chapter 1 is an introduction to the field of dependable systems and fault tolerance. Fundamental terms and notations, which are used throughout this thesis for classification and evaluation, are provided. The used processor model – the VARP processor – is introduced in chapter 2 together with a hardware-based self-repair scheme for that processor. The results are used as reference values for evaluating the software-based methods. Chapter 3 introduces the fundamental concept of the software-based self-repair. In chapter 4 hybrid methods are derived by combining software-based and hardware-based methods, highlighting the synergy effects of the combination. Finally, in chapter 5, a diagnostic and adaptive software-based self-test scheme is introduced. This self-test scheme provides the diagnostic capability that is needed in the field for identifying defect components in the VARP processor and completes the comprehensive software-based self-test and self-repair approach.show moreshow less

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Metadaten
Author: Mario Schölzel
URN:urn:nbn:de:kobv:co1-opus4-31265
Referee / Advisor:Prof. Dr. Ing. Heinrich Theodor Vierhaus
Document Type:Habilitation thesis
Language:English
Year of Completion:2014
Date of final exam:2014/07/03
Release Date:2014/09/05
Tag:Diagnose; Fehlertoleranz; Selbstreparatur; Selbsttest; VLIW
Diagnosis; Fault Tolerance; Self-Repair; Self-Test; VLIW
Institutes:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Technische Informatik
Institution name at the time of publication:Fakultät für Mathematik, Naturwissenschaften und Informatik (eBTU) / LS Technische Informatik
Licence (German):Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
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