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Channel Coded Processor for Enhanced Safety

  • Several concepts are known for improving processor safety, all of them having their pros and cons. Some are very resource intensive, others have limited capabilities regarding the provided error safety. In this paper we use research on channel coding of noisy communication channels known from communication theory as an analogy to random bit errors in processors. We incorporate this knowledge into processor design to suggest a new error correction concept by using channel coding in processors. The new concept of a Channel Coded Processor could provide effective implementation of redundancy by the channel coding that enables error correction. The concept could also create a complete chain of redundancy in all areas and components of the processor ranging from the code compiler through the processing hardware to the output of the information.

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Metadaten
Author:Alfons Steinkirchner, Thomas FuhrmannORCiDGND, Michael NiemetzORCiDGND
DOI:https://doi.org/10.18178/ijfcc.2017.6.2.489
ISSN:2010-3751
Parent Title (English):International Journal of Future Computer and Communication (IJFCC)
Publisher:International Association of Computer Science and Information
Place of publication:Singapore
Document Type:Article
Language:English
Year of first Publication:2017
Release Date:2022/04/05
Tag:Channel coded processor concept; communication theory; safety; soft error
Volume:6
Issue:2
First Page:58
Last Page:62
Institutes:Fakultät Elektro- und Informationstechnik
Fakultät Elektro- und Informationstechnik / Labor Datenkommunikation
Fakultät Elektro- und Informationstechnik / Labor Optische Übertragungssysteme
Begutachtungsstatus:peer-reviewed
research focus:Energie und Mobilität
Licence (German):Keine Lizenz - Es gilt das deutsche Urheberrecht: § 53 UrhG