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VHDL Based Simulation of a Delta-Sigma A/D Converter Clocked with a Phase-Locked Loop

  • The VHDL based mixed-signal event-driven (MixED) simulation method is employed to simulate a comprehensive system containing a number of mixed-signal building blocks: an analog waveform generator, a phase-locked loop and two ∆Σ modulators for A/D conversion.

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Metadaten
Author:Martin J. W. Schubert
URL / DOI:https://hps.hs-regensburg.de/~scm39115/homepage/research/mixed/mixed_publications/2001_date_pll_sigmadelta.pdf
Parent Title (English):Design, Automation and Test in Europe, DATE'2001 Conference, March 13-16 2001, Munich
Document Type:conference proceeding (article)
Language:English
Year of first Publication:2001
Release Date:2021/05/21
Institutes:Fakultät Elektro- und Informationstechnik
Fakultät Elektro- und Informationstechnik / Labor Elektronik
research focus:Produktion und Systeme