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Mixed-Signal Event-Driven Simulation of a Phase-Locked Loop

  • The mixed-signal event-driven (MixED) simulationalgorithm using standard VHDL is capable of modelinga number of analog and mixed-signal problems in digital circuits, e.g. RCL networks representing pads or wires, charge pumps, dynamic logic, voltage-controlledoscillators, phase-locked loops, etc. Important featuresare single-kernel simulation as well as rapid A/D andD/A interfacing. This paper demonstrates the simulation of a phase-locked loop (PLL), which is one of the most interesting applications of the MixED method. Many digital designs contain a PLL as only mixed-signal building block. The MixED method allows to simulate such designs with standard VHDL.

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Metadaten
Author:Martin J. W. Schubert
URL / DOI:https://hps.hs-regensburg.de/~scm39115/homepage/research/mixed/mixed_publications/1999_bmas_pll.pdf
Parent Title (English):IEEE/VIUF International Workshops on Behavioral Modeling and Simulation (BMAS'99), October 4-6 1999, Orlando, Florida, USA
Document Type:conference proceeding (article)
Language:English
Year of first Publication:1999
Release Date:2021/05/20
Tag:PLL; analog models; mixed-signal event-drivensimulation; standard VHDL
Institutes:Fakultät Elektro- und Informationstechnik
Fakultät Elektro- und Informationstechnik / Labor Elektronik
Begutachtungsstatus:peer-reviewed
research focus:Produktion und Systeme