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The Buchberger algorithm is a basic tool for the solution of systems of polynomial equations in an environment of computer algebra applications. A model for overlapped processing of different steps of the algorithm is presented, which uses the data structure of the polynomials (distributive representation) for synchronization. The model can be applied for multi processors with fast access to shared data. It is tested with Cray X-MP multi processors based on a parallel version of Portable Standard Lisp (PSL 3.4).
Gröbner bases are the main tool for solving systems of algebraic equations and some other problems in connection with polynomial ideals using Computer Algebra Systems. The procedure for the computation of Gröbner bases in REDUCE 3.3 has been modified in order to solve more complicated algebraic systems of equations by some general improvements and by some tools based on the specific resources of the CRAY X-MP. We present this modification and illustrate it by examples.
Portable Standard LISP (PSL, Version 3.4) and REDUCE 3 were implemented for CRAY1 and Cray X- MP computers at the Konrad-Zuse-Zentrum Berlin in 1986. As an special aspect of the implementation of PSL, an interface to the vector hardware of CRAY processors was defined. With that interface and mostly driven by the needs of REDUCE applications (e.g. extensive calculations of Gröbner bases), the arbitrary precision integer arithmetic of PSL was rebuild using full power of the vector hardware. A modular arithmetic using vector hardware was also constructed.
The SPARC processor is a RISC (Reduced Instruction Set Computer) microcomputer, built into the SUN4 workstations. Since RISC processors are very well-suited for LISP processing, the implementation of a dialect of LISP (Portable Standard LISP, PSL) boded well for a great speed-up in comparison with other types of microcomputers. A first approach was done at The RAND Corporation in Santa Monica, which was derived from classical processor types like MC68000 or VAX. At the Konrad- Zuse-Zentrum für Informationstechnik Berlin (ZIB) that initial implementation was redesigned in order to adapt PSL to the specific features of the SPARC processor. The present implementation, in some parts, is very close to Cray PSL version also done in ZIB. Some timing informations are given in the appendix.