TY - CHAP A1 - Knaust, Marius A1 - Seiler, Enrico A1 - Reinert, Knut A1 - Steinke, Thomas T1 - Co-Design for Energy Efficient and Fast Genomic Search: Interleaved Bloom Filter on FPGA T2 - FPGA '22: Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays N2 - Next-Generation Sequencing technologies generate a vast and exponentially increasing amount of sequence data. The Interleaved Bloom Filter (IBF) is a novel indexing data structure which is state-of-the-art for distributing approximate queries with an in-memory data structure. With it, a main task of sequence analysis pipelines, (approximately) searching large reference data sets for sequencing reads or short sequence patterns like genes, can be significantly accelerated. To meet performance and energy-efficiency requirements, we chose a co-design approach of the IBF data structure on the FPGA platform. Further, our OpenCL-based implementation allows a seamless integration into the widely used SeqAn C++ library for biological sequence analysis. Our algorithmic design and optimization strategy takes advantage of FPGA-specific features like shift register and the parallelization potential of many bitwise operations. We designed a well-chosen schema to partition data across the different memory domains on the FPGA platform using the Shared Virtual Memory concept. We can demonstrate significant improvements in energy efficiency of up to 19x and in performance of up to 5.6x, respectively, compared to a well-tuned, multithreaded CPU reference. Y1 - 2022 U6 - https://doi.org/10.1145/3490422.3502366 SP - 180 EP - 189 ER - TY - CHAP A1 - Baumann, Tobias A1 - Noack, Matthias A1 - Steinke, Thomas T1 - Performance Evaluation and Improvements of the PoCL Open-Source OpenCL Implementation on Intel CPUs T2 - IWOCL'21: International Workshop on OpenCL N2 - The Portable Computing Language (PoCL) is a vendor independent open-source OpenCL implementation that aims to support a variety of compute devices in a single platform. Evaluating PoCL versus the Intel OpenCL implementation reveals significant performance drawbacks of PoCL on Intel CPUs – which run 92 % of the TOP500 list. Using a selection of benchmarks, we identify and analyse performance issues in PoCL with a focus on scheduling and vectorisation. We propose a new CPU device-driver based on Intel Threading Building Blocks (TBB), and evaluate LLVM with respect to automatic compiler vectorisation across work-items in PoCL. Using the TBB driver, it is possible to narrow the gap to Intel OpenCL and even outperform it by a factor of up to 1.3× in our proxy application benchmark with a manual vectorisation strategy. Y1 - 2021 U6 - https://doi.org/10.1145/3456669.3456698 ER -