TY - CHAP A1 - Wende, Florian A1 - Marsman, Martijn A1 - Steinke, Thomas T1 - On Enhancing 3D-FFT Performance in VASP T2 - CUG Proceedings Y1 - 2016 ER - TY - CHAP A1 - Noack, Matthias A1 - Reinefeld, Alexander A1 - Kramer, Tobias A1 - Steinke, Thomas T1 - DM-HEOM: A Portable and Scalable Solver-Framework for the Hierarchical Equations of Motion T2 - 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 19th IEEE Int. Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC 2018) N2 - Computing the Hierarchical Equations of Motion (HEOM) is by itself a challenging problem, and so is writing portable production code that runs efficiently on a variety of architectures while scaling from PCs to supercomputers. We combined both challenges to push the boundaries of simulating quantum systems, and to evaluate and improve methodologies for scientific software engineering. Our contributions are threefold: We present the first distributed memory implementation of the HEOM method (DM-HEOM), we describe an interdisciplinary development workflow, and we provide guidelines and experiences for designing distributed, performance-portable HPC applications with MPI-3, OpenCL and other state-of-the-art programming models. We evaluated the resulting code on multi- and many-core CPUs as well as GPUs, and demonstrate scalability on a Cray XC40 supercomputer for the PS I molecular light harvesting complex. Y1 - 2018 SN - 978-1-5386-5555-9 U6 - https://doi.org/10.1109/IPDPSW.2018.00149 N1 - Best Paper Award SP - 947 EP - 956 ER - TY - CHAP A1 - Knaust, Marius A1 - Mayer, Florian A1 - Steinke, Thomas T1 - OpenMP to FPGA Offloading Prototype Using OpenCL SDK T2 - 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) N2 - Field-programmable gate arrays (FPGAs) are of great interest for future high-performance computing and data analytics systems, since they are capable of efficient, highly-parallel data processing. Even though high-level synthesis became more popular in the last years, the effort of porting existing scientific software onto FPGAs is still considerable. We propose to use OpenMP target offloading as a solution, which we implement in a first prototype, making use of the preexisting OpenCL SDK of the FPGA vendor. Early results demonstrate the feasibility of this approach and also reveal that further optimizations will be necessary such that code can be written in an FPGA-agnostic way. Y1 - 2019 U6 - https://doi.org/10.1109/IPDPSW.2019.00072 SP - 387 EP - 390 ER - TY - CHAP A1 - Christgau, Steffen A1 - Steinke, Thomas T1 - Porting a Legacy CUDA Stencil Code to oneAPI T2 - 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2020, New Orleans, LA, USA, May 18-22, 2020 N2 - Recently, Intel released the oneAPI programming environment. With Data Parallel C++ (DPC++), oneAPI enables codes to target multiple hardware architectures like multi-core CPUs, GPUs, and even FPGAs or other hardware using a single source. For legacy codes that were written for Nvidia GPUs, a compatibility tool is provided which facilitates the transition to the SYCL-based DPC++ programming language. This paper presents early experiences when using both the compatibility tool and oneAPI as well the employed extension to the SYCL programming standard for the tsunami simulation code easyWave. A performance study compares the original code running on Xeon processors using OpenMP as well as CUDA with the performance of the DPC++ counter part on multicore CPUs as well as integrated GPUs. Y1 - 2020 SN - 978-1-7281-7445-7 U6 - https://doi.org/10.1109/IPDPSW50202.2020.00070 SP - 359 EP - 367 PB - IEEE CY - New Orleans ER - TY - JOUR A1 - Alhaddad, Samer A1 - Förstner, Jens A1 - Groth, Stefan A1 - Grünewald, Daniel A1 - Grynko, Yevgen A1 - Hannig, Frank A1 - Kenter, Tobias A1 - Pfreundt, Franz-Josef A1 - Plessl, Christian A1 - Schotte, Merlind A1 - Steinke, Thomas A1 - Teich, Jürgen A1 - Weiser, Martin A1 - Wende, Florian T1 - HighPerMeshes - A Domain-Specific Language for Numerical Algorithms on Unstructured Grids JF - Euro-Par 2020: Parallel Processing Workshops. N2 - Solving partial differential equations on unstructured grids is a cornerstone of engineering and scientific computing. Nowadays, heterogeneous parallel platforms with CPUs, GPUs, and FPGAs enable energy-efficient and computationally demanding simulations. We developed the HighPerMeshes C++-embedded Domain-Specific Language (DSL) for bridging the abstraction gap between the mathematical and algorithmic formulation of mesh-based algorithms for PDE problems on the one hand and an increasing number of heterogeneous platforms with their different parallel programming and runtime models on the other hand. Thus, the HighPerMeshes DSL aims at higher productivity in the code development process for multiple target platforms. We introduce the concepts as well as the basic structure of the HighPer-Meshes DSL, and demonstrate its usage with three examples, a Poisson and monodomain problem, respectively, solved by the continuous finite element method, and the discontinuous Galerkin method for Maxwell’s equation. The mapping of the abstract algorithmic description onto parallel hardware, including distributed memory compute clusters is presented. Finally, the achievable performance and scalability are demonstrated for a typical example problem on a multi-core CPU cluster. Y1 - 2021 U6 - https://doi.org/10.1007/978-3-030-71593-9_15 SP - 185 EP - 196 PB - Springer ER - TY - CHAP A1 - Christgau, Steffen A1 - Steinke, Thomas T1 - Leveraging a Heterogeneous Memory System for a Legacy Fortran Code: The Interplay of Storage Class Memory, DRAM and OS T2 - 2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) N2 - Large capacity Storage Class Memory (SCM) opens new possibilities for workloads requiring a large memory footprint. We examine optimization strategies for a legacy Fortran application on systems with an heterogeneous memory configuration comprising SCM and DRAM. We present a performance study for the multigrid solver component of the large-eddy simulation framework PALM for different memory configurations with large capacity SCM. An important optimization approach is the explicit assignment of storage locations depending on the data access characteristic to take advantage of the heterogeneous memory configuration. We are able to demonstrate that an explicit control over memory locations provides better performance compared to transparent hardware settings. As on aforementioned systems the page management by the OS appears as critical performance factor, we study the impact of different huge page settings. Y1 - 2020 SN - 978-0-7381-1067-7 U6 - https://doi.org/10.1109/MCHPC51950.2020.00008 SP - 17 EP - 24 PB - IEEE ER - TY - JOUR A1 - Knoop, Helge A1 - Gronemeier, Tobias A1 - Sühring, Matthias A1 - Steinbach, Peter A1 - Noack, Matthias A1 - Wende, Florian A1 - Steinke, Thomas A1 - Knigge, Christoph A1 - Raasch, Siegfried A1 - Ketelsen, Klaus T1 - Porting the MPI-parallelized LES model PALM to multi-GPU systems and many integrated core processors: an experience report JF - International Journal of Computational Science and Engineering. Special Issue on: Novel Strategies for Programming Accelerators N2 - The computational power and availability of graphics processing units (GPUs), such as the Nvidia Tesla, and Many Integrated Core (MIC) processors, such as the Intel Xeon Phi, on high performance computing (HPC) systems is rapidly evolving. However, HPC applications need to be ported to take advantage of such hardware. This paper is a report on our experience of porting the MPI+OpenMP parallelised large-eddy simulation model (PALM) to multi-GPU as well as to MIC processor environments using the directive-based high level programming paradigm OpenACC and OpenMP, respectively. PALM is a Fortran-based computational fluid dynamics software package, used for the simulation of atmospheric and oceanic boundary layers to answer questions linked to fundamental atmospheric turbulence research, urban modelling, aircraft safety and cloud physics. Development of PALM started in 1997, the project currently entails 140 kLOC and is used on HPC farms of up to 43,200 cores. The main challenges we faced during the porting process are the size and complexity of the PALM code base, its inconsistent modularisation and the complete lack of a unit-test suite. We report the methods used to identify performance issues as well as our experiences with state-of-the-art profiling tools. Moreover, we outline the required porting steps in order to properly execute our code on GPUs and MIC processors, describe the problems and bottlenecks that we encountered during the porting process, and present separate performance tests for both architectures. These performance tests, however, do not provide any benchmark information that compares the performance of the ported code between the two architectures. Y1 - 2017 PB - Inderscience ET - Special Issue on: Novel Strategies for Programming Accelerators ER - TY - CHAP A1 - Noack, Matthias A1 - Wende, Florian A1 - Zitzlsberger, Georg A1 - Klemm, Michael A1 - Steinke, Thomas T1 - KART - A Runtime Compilation Library for Improving HPC Application Performance T2 - High Performance Computing: ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Frankfurt, Germany, June 18-22, 2017, Revised Selected Papers N2 - The effectiveness of ahead-of-time compiler optimization heavily depends on the amount of available information at compile time. Input-specific information that is only available at runtime cannot be used, although it often determines loop counts, branching predicates and paths, as well as memory-access patterns. It can also be crucial for generating efficient SIMD-vectorized code. This is especially relevant for the many-core architectures paving the way to exascale computing, which are more sensitive to code-optimization. We explore the design-space for using input-specific information at compile-time and present KART, a C++ library solution that allows developers tocompile, link, and execute code (e.g., C, C++ , Fortran) at application runtime. Besides mere runtime compilation of performance-critical code, KART can be used to instantiate the same code multiple times using different inputs, compilers, and options. Other techniques like auto-tuning and code-generation can be integrated into a KART-enabled application instead of being scripted around it. We evaluate runtimes and compilation costs for different synthetic kernels, and show the effectiveness for two real-world applications, HEOM and a WSM6 proxy. Y1 - 2017 U6 - https://doi.org/10.1007/978-3-319-67630-2_29 N1 - Best Paper Award VL - 10524 SP - 389 EP - 403 PB - Springer International Publishing ER - TY - CHAP A1 - Noack, Matthias A1 - Focht, Erich A1 - Steinke, Thomas T1 - Heterogeneous Active Messages for Offloading on the NEC SX-Aurora TSUBASA T2 - 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Heterogeneity in Computing Workshop (HCW 2019) N2 - The NEC SX-Aurora TSUBASA is a new generation of vector processing architectures that combines a standard Intel Xeon host with the newly developed NEC Vector Engine co-processor cards. One way to use these co-processors is offloading suitable parts of the program from the host to the Vector Engines. Currently, the only vendor-provided offloading solutions are the low-level Vector Engine Offloading (VEO) library, and a builtin reverse-offloading mechanism named VHcall. In this work, we extend the portable Heterogeneous Active Messages (HAM) based HAM-Offload framework with support for the NEC SX-Aurora TSUBASA. Therefore, we design, implement, and evaluate two messaging protocols aimed at minimising offloading cost. This sheds some light on how to achieve fast communication between host CPU and the Vector Engines of the NEC SX-Aurora TSUBASA. Compared with VEO, the DMA-based protocol reduces offloading overhead by a factor of 13×. The resulting framework enables users to write portable offload applications with low overhead, that do neither require a language extension like OpenMP, nor a special language like OpenCL. Existing HAM-Offload applications are now ready to run on the NEC SX-Aurora TSUBASA. Y1 - 2019 ER - TY - GEN A1 - Stalling, Detlev A1 - Steinke, Thomas T1 - Visualization of Vector Fields in Quantum Chemistry N2 - \small Many interesting phenomena in molecular systems like interactions between macro-molecules, protein-substrate docking, or channeling processes in membranes are gouverned to a high degree by classical Coulomb or van-der-Waals forces. The visualization of these force fields is important for verifying numerical simulations. Moreover, by inspecting the forces visually we can gain deeper insight into the molecular processes. Up to now the visualization of vector fields is quite unusual in computational chemistry. In fact many commercial software packages do not support this topic at all. The reason is not that vector fields are considered unimportant, but mainly because of the lack of adequate visualization methods. In this paper we survey a number of methods for vector field visualization, ranging from well-known concepts like arrow or streamline plots to more advanced techniques like line integral convolution, and show how these can be applied to computational chemistry. A combination of the most meaningful methods in an interactive 3D visualization environment can provide a powerful tool box for analysing simulations in molecular dynamics. T3 - ZIB-Report - SC-96-01 Y1 - 1996 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:0297-zib-2124 ER -