@inproceedings{ChristgauSteinke, author = {Christgau, Steffen and Steinke, Thomas}, title = {Leveraging a Heterogeneous Memory System for a Legacy Fortran Code: The Interplay of Storage Class Memory, DRAM and OS}, series = {2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC)}, booktitle = {2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC)}, publisher = {IEEE}, isbn = {978-0-7381-1067-7}, doi = {10.1109/MCHPC51950.2020.00008}, pages = {17 -- 24}, abstract = {Large capacity Storage Class Memory (SCM) opens new possibilities for workloads requiring a large memory footprint. We examine optimization strategies for a legacy Fortran application on systems with an heterogeneous memory configuration comprising SCM and DRAM. We present a performance study for the multigrid solver component of the large-eddy simulation framework PALM for different memory configurations with large capacity SCM. An important optimization approach is the explicit assignment of storage locations depending on the data access characteristic to take advantage of the heterogeneous memory configuration. We are able to demonstrate that an explicit control over memory locations provides better performance compared to transparent hardware settings. As on aforementioned systems the page management by the OS appears as critical performance factor, we study the impact of different huge page settings.}, language = {en} } @inproceedings{BaumannNoackSteinke, author = {Baumann, Tobias and Noack, Matthias and Steinke, Thomas}, title = {Performance Evaluation and Improvements of the PoCL Open-Source OpenCL Implementation on Intel CPUs}, series = {IWOCL'21: International Workshop on OpenCL}, booktitle = {IWOCL'21: International Workshop on OpenCL}, doi = {10.1145/3456669.3456698}, abstract = {The Portable Computing Language (PoCL) is a vendor independent open-source OpenCL implementation that aims to support a variety of compute devices in a single platform. Evaluating PoCL versus the Intel OpenCL implementation reveals significant performance drawbacks of PoCL on Intel CPUs - which run 92 \% of the TOP500 list. Using a selection of benchmarks, we identify and analyse performance issues in PoCL with a focus on scheduling and vectorisation. We propose a new CPU device-driver based on Intel Threading Building Blocks (TBB), and evaluate LLVM with respect to automatic compiler vectorisation across work-items in PoCL. Using the TBB driver, it is possible to narrow the gap to Intel OpenCL and even outperform it by a factor of up to 1.3× in our proxy application benchmark with a manual vectorisation strategy.}, language = {en} }