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A Comprehensive Comparison of Fuzzy Extractor Schemes Employing Different Error Correction Codes (2023)
Mexis, Nico
This thesis deals with fuzzy extractors, security primitives often used in conjunction with Physical Unclonable Functions (PUFs). A fuzzy extractor works in two stages: The generation phase and the reproduction phase. In the generation phase, an Error Correction Code (ECC) is used to compute redundant bits for a given PUF response, which are then stored as helper data, and a key is extracted from the response. Then, in the reproduction phase, another (possibly noisy) PUF response can be used in conjunction with this helper data to extract the original key. It is clear that the performance of the fuzzy extractor is strongly dependent on the underlying ECC. Therefore, a comparison of ECCs in the context of fuzzy extractors is essential in order to make them as suitable as possible for a given situation. It is important to note that due to the plethora of various PUFs with different characteristics, it is very unrealistic to propose a single metric by which the suitability of a given ECC can be measured. First, we give a brief introduction to the topic, followed by a detailed description of the background of the ECCs and fuzzy extractors studied. Then, we summarise related work and describe an implementation of the ECCs under consideration. Finally, we carry out the actual comparison of the ECCs and the thesis concludes with a summary of the results and suggestions for future work.
Integrating physical unclonable functions from novel nanomaterials, circuit elements, and memory technologies into future hardware architectures (2026)
Frank, Florian
Cryptographic keys are fundamental components for ensuring security in digital systems. To ensure reliable key generation and management, various technical concepts have been developed, primarily based on dedicated hardware components such as Trusted Platform Modules (TPMs). However, many modern systems, especially small resource-constrained devices, typically lack hardware support for secure key generation and management. To address these limitations, Physical Unclonable Functions (PUFs) have proven to be an effective solution for key generation, device authentication, and identification tasks. PUFs leverage inherent variations in hardware components to produce unique, device-specific keys. For a well-designed PUF, these keys can be reproduced reliably on the same device but are practically impossible to clone. Various types of PUFs exist, including those that exploit slight delay differences in circuits with symmetric paths. Others rely on physical characteristics of components already present in the computing system, such as SRAM or DRAM. However, many of these constructions rely on technologies that could be replaced by emerging ones in the future. Such a replacement may involve a transition from traditional memory technologies, such as SRAM, DRAM, and flash memory, to emerging Non-Volatile Memories (NVMs), including Ferroelectric RAM (FRAM), Magnetoresistive RAM (MRAM), and Resistive RAM (ReRAM). These new technologies, in turn, necessitate innovative hardware security solutions for generating intrinsic hardware fingerprints, ensuring security for next-generation embedded devices. Furthermore, the integration of nanomaterials, such as carbon nanotubes, into processor architectures and the adoption of reconfigurable hardware platforms like Field-Programmable Gate Arrays (FPGAs) require the development of specifically tailored cybersecurity solutions. This dissertation aims to develop hardware-based security mechanisms for these types of devices by designing new PUF constructions and demonstrating their practical applications. One focus lies on PUFs extracted from nanomaterials and emerging circuit elements, particularly memristive devices and Carbon NanoTube Field-Effect Transistors (CNT-FETs). For memristive devices, which form the basis of ReRAM memory, this work analyzes methods ranging from simple binary quantization to advanced techniques exploiting device-specific response patterns. In the case of CNT-FETs, custom-fabricated wafers are developed to construct PUFs with optimal properties, such as high robustness, uniformity, and entropy, even under varying environmental conditions. These conditions include fluctuations in ambient temperature. Based on an analysis of fundamental system components, this work evaluates the feasibility of deriving PUFs from fully integrated circuits. A specific focus is placed on emerging non-volatile memory technologies, assessing their potential for PUF applications. To achieve PUF behavior in these memory devices, techniques such as intentional timing manipulation, induced bit flips through row hammering, and variations in supply voltage are examined. These resulting bit flips can be exploited as PUF responses. Additionally, transforming raw PUF responses into cryptographically usable keys and integrating specific PUFs into practical applications are core components of this work. The demonstrated practical applications include an innovative architecture for encrypting and binding data to non-volatile memory modules, implemented on Multiprocessor System-on-Chips (MPSoCs) incorporating FPGAs. This architecture enables the storage of confidential data on non-volatile memory while simultaneously using the same module as a PUF, without requiring separate memory partitions solely for the PUF functionality. Finally, practical applications of hardware fingerprints in the automotive sector are demonstrated, including an FPGA-based implementation to maintain security while preserving the temporal determinism of time-critical messages. These goals are met through the use of hardware-implemented cryptographic algorithms coupled with an FPGA-based ring oscillator PUF. To summarize, this work presents new types of PUF implementations, starting with nanomaterials and emerging circuit elements, extending to PUFs derived from integrated circuits, and demonstrates innovative solutions for their integration into MPSoC-based architectures.
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