TY - JOUR A1 - Anand, Ketan A1 - Schubert, Markus Andreas A1 - Corley-Wiciak, Agnieszka Anna A1 - Spirito, Davide A1 - Corley-Wiciak, Cedric A1 - Klesse, Wolfgang M. A1 - Mai, Andreas A1 - Tillack, Bernd A1 - Yamamoto, Yuji T1 - Lateral Selective SiGe Growth for Local Dislocation-Free SiGe-on-Insulator Virtual Substrate Fabrication JF - ECS Journal of Solid State Science and Technology N2 - Dislocation free local SiGe-on-insulator (SGOI) virtual substrate is fabricated using lateral selective SiGe growth by reduced pressure chemical vapor deposition. The lateral selective SiGe growth is performed around a ∼1.25 μm square Si (001) pillar in a cavity formed by HCl vapor phase etching of Si at 850 °C from side of SiO2/Si mesa structure on buried oxide. Smooth root mean square roughness of SiGe surface of 0.14 nm, which is determined by interface roughness between the sacrificially etched Si and the SiO2 cap, is obtained. Uniform Ge content of ∼40% in the laterally grown SiGe is observed. In the Si pillar, tensile strain of ∼0.65% is found which could be due to thermal expansion difference between SiO2 and Si. In the SiGe, tensile strain of ∼1.4% along 〈010〉 direction, which is higher compared to that along 〈110〉 direction, is observed. The tensile strain is induced from both [110] and [−110] directions. Threading dislocations in the SiGe are located only ∼400 nm from Si pillar and stacking faults are running towards 〈110〉 directions, resulting in the formation of a wide dislocation-free area in SiGe along 〈010〉 due to horizontal aspect ratio trapping. Y1 - 2023 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:kobv:526-opus4-17013 VL - 12 PB - Electrochemical Society (ECS); IOP ER - TY - JOUR A1 - Kalishettyhalli Mahadevaiah, Mamathamba A1 - Pérez, Eduardo A1 - Lisker, Marco A1 - Schubert, Markus Andreas A1 - Perez-Bosch Quesada, Emilio A1 - Wenger, Christian A1 - Mai, Andreas T1 - Modulating the Filamentary-Based Resistive Switching Properties of HfO₂ Memristive Devices by Adding Al₂O₃ Layers JF - Electronics N2 - The resistive switching properties of HfO₂ based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al₂O₃ into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I–V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit. Y1 - 2022 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:kobv:526-opus4-16172 SN - 2079-9292 VL - 11 IS - 10 CY - MDPI ER - TY - JOUR A1 - Lux, Helge A1 - Siemroth, Peter A1 - Sgarlata, Anna A1 - Prosposito, Paolo A1 - Schubert, Markus Andreas A1 - Casalboni, Mauro A1 - Schrader, Sigurd T1 - Synthesis of graphene-like transparent conductive films on dielectric substrates using a modified filtered vacuum arc system JF - Journal of Applied Physics N2 - Here, we present a reliable process to deposit transparent conductive films on silicon oxide, quartz, and sapphire using a solid carbon source. This layer consists of partially ordered graphene flakes with a lateral dimension of about 5 nm. The process does not require any catalytic metal and exploits a high current arc evaporation (Φ-HCA) to homogeneously deposit a layer of carbon on heated substrates. A gas atmosphere consisting of Argon or Argon/Hydrogen blend acting as a buffer influences the morphology of the growing film. scanning tunneling microscopy, transmission electron microscopy, and Raman spectra were used for a thorough characterization of the samples in order to optimize the growth parameters. The best carbon layers have a surface resistance of 5.7 × 103 Ω◻ whereas the optical transparency of the coatings is 88% with an excellent homogeneity over areas of several cm2. Such results are compatible with most semiconductor fabrication processes and make this method very promising for various industrial applications. Y1 - 2015 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:kobv:526-opus4-9738 SN - 1089-7550 VL - 117 IS - 19 ER -