TY - CHAP A1 - Kalishettyhalli Mahadevaiah, Mamathamba A1 - Lisker, Marco A1 - Fraschke, Mirko A1 - Marschmeyer, Steffen A1 - Pérez, Eduardo A1 - Perez-Bosch Quesada, Emilio A1 - Wenger, Christian A1 - Mai, Andreas ED - Ziegler, Martin ED - Mussenbrock, Thomas ED - Kohlstedt, Hermann T1 - Integration of Memristive Devices into a 130 nm CMOS Baseline Technology T2 - Bio-Inspired Information Pathways: From Neuroscience to Neurotronics N2 - The two main features of the memristive devices which makes them the promising candidates for neuromorphic applications are low power consumption and CMOS compatibility. The monolithic integration of memristive devices with CMOS circuitry paves the way for in-memory computing. This chapter focuses on the factors governing the CMOS integration process. Firstly, the influence of CMOS baseline technology selection on the memristor module is briefly discussed. Secondly, the selection of metal level interconnects and their effect on the memristive device performance is explained. Further, the widely used deposition technique for the CMOS compatible memristive switching layers is presented. Finally, the implementation of the optimized process for the fabrication of the memristive module and its influence on the device performance is presented in terms of electrical characterization results. KW - CMOS compatibility KW - CMOS integration KW - memristive device KW - pristine current KW - resistive switching KW - thermal budget KW - encapsulation Y1 - 2024 U6 - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:kobv:526-opus4-18029 SN - 978-3-031-36705-2 SP - 177 EP - 190 PB - Springer International Publishing CY - Cham ER -