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  <doc>
    <id>1617</id>
    <completedYear>2022</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue>10</issue>
    <volume>11</volume>
    <type>article</type>
    <publisherName/>
    <publisherPlace>MDPI</publisherPlace>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Modulating the Filamentary-Based Resistive Switching Properties of HfO₂ Memristive Devices by Adding Al₂O₃ Layers</title>
    <abstract language="eng">The resistive switching properties of HfO₂ based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al₂O₃ into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I–V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit.</abstract>
    <parentTitle language="eng">Electronics</parentTitle>
    <identifier type="issn">2079-9292</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-16172</identifier>
    <enrichment key="opus.import.date">2022-06-16T07:03:01+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="opus.import.file">filename=phpFK6bUR</enrichment>
    <enrichment key="opus.import.checksum">0b96b17d5de532d08553a414296bd1d8</enrichment>
    <enrichment key="SourceTitle">Kalishettyhalli Mahadevaiah, M.; Perez, E.; Lisker, M.; Schubert, M.A.; Perez-Bosch Quesada, E.; Wenger, C.; Mai, A. Modulating the Filamentary-Based Resistive Switching Properties of HfO2 Memristive Devices by Adding Al2O3 Layers. Electronics 2022, 11, 1540. https://doi.org/10.3390/electronics11101540</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.3390/electronics11101540</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Eduardo Pérez</author>
    <author>Marco Lisker</author>
    <author>Markus Andreas Schubert</author>
    <author>Emilio Perez-Bosch Quesada</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <collection role="ddc" number="620">Ingenieurwissenschaften und zugeordnete Tätigkeiten</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <collection role="green_open_access" number="1">Gold Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1617/electronics-11-01540-v2.pdf</file>
  </doc>
  <doc>
    <id>1802</id>
    <completedYear>2024</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>177</pageFirst>
    <pageLast>190</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>bookpart</type>
    <publisherName>Springer International Publishing</publisherName>
    <publisherPlace>Cham</publisherPlace>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Integration of Memristive Devices into a 130 nm CMOS Baseline Technology</title>
    <abstract language="eng">The two main features of the memristive devices which makes them the promising candidates for neuromorphic applications are low power consumption and CMOS compatibility. The monolithic integration of memristive devices with CMOS circuitry paves the way for in-memory computing. This chapter focuses on the factors governing the CMOS integration process. Firstly, the influence of CMOS baseline technology selection on the memristor module is briefly discussed. Secondly, the selection of metal level interconnects and their effect on the memristive device performance is explained. Further, the widely used deposition technique for the CMOS compatible memristive switching layers is presented. Finally, the implementation of the optimized process for the fabrication of the memristive module and its influence on the device performance is presented in terms of electrical characterization results.</abstract>
    <parentTitle language="eng">Bio-Inspired Information Pathways: From Neuroscience to Neurotronics</parentTitle>
    <identifier type="isbn">978-3-031-36705-2</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-18029</identifier>
    <enrichment key="opus.import.date">2023-09-26T08:08:29+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="SourceTitle">Mahadevaiah, M.K. et al. (2024). Integration of Memristive Devices into a 130 nm CMOS Baseline Technology. In: Ziegler, M., Mussenbrock, T., Kohlstedt, H. (eds) Bio-Inspired Information Pathways. Springer Series on Bio- and Neurosystems, vol 16. Springer, Cham. https://doi.org/10.1007/978-3-031-36705-2_7</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1007/978-3-031-36705-2_7</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Marco Lisker</author>
    <author>Mirko Fraschke</author>
    <author>Steffen Marschmeyer</author>
    <author>Eduardo Pérez</author>
    <author>Emilio Perez-Bosch Quesada</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>CMOS compatibility</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>CMOS integration</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>memristive device</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>pristine current</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>resistive switching</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>thermal budget</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>encapsulation</value>
    </subject>
    <collection role="ddc" number="621">Angewandte Physik</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1802/978-3-031-36705-2_7.pdf</file>
  </doc>
  <doc>
    <id>1970</id>
    <completedYear>2024</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume>97</volume>
    <type>article</type>
    <publisherName>Springer Nature</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Optimization of technology processes for enhanced CMOS-integrated 1T-1R RRAM device performance</title>
    <abstract language="eng">Implementing artificial synapses that emulate the synaptic behavior observed in the brain is one of the most critical requirements for neuromorphic computing. Resistive random-access memories (RRAM) have been proposed as a candidate for artificial synaptic devices. For this applicability, RRAM device performance depends on the technology used to fabricate the metal–insulator–metal (MIM) stack and the technology chosen for the selector device. To analyze these dependencies, the integrated RRAM devices in a 4k-bit array are studied on a 200 mm wafer scale in this work. The RRAM devices are integrated into two different CMOS transistor technologies of IHP, namely 250 nm and 130 nm and the devices are compared in terms of their pristine state current. The devices in 130 nm technology have shown lower number of high pristine state current devices per die in comparison to the 250 nm technology. For the 130 nm technology, the forming voltage is reduced due to the decrease of HfO₂ dielectric thickness from 8 nm to 5 nm. Additionally, 5% Al-doped 4 nm HfO₂ dielectric displayed a similar reduction in forming voltage and a lower variation in the values. Finally, the multi-level switching between the dielectric layers in 250 nm and 130 nm technologies are compared, where 130 nm showed a more significant number of conductance levels of seven compared to only four levels observed in 250 nm technology.</abstract>
    <parentTitle language="eng">The European Physical Journal B : Condensed Matter and Complex Systems</parentTitle>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-19701</identifier>
    <enrichment key="opus.import.date">2024-12-03T07:25:21+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1140/epjb/s10051-024-00821-1</enrichment>
    <enrichment key="SourceTitle">Dorai Swamy Reddy, K., Pérez, E., Baroni, A. et al. Optimization of technology processes for enhanced CMOS-integrated 1T-1R RRAM device performance. Eur. Phys. J. B 97, 181 (2024). https://doi.org/10.1140/epjb/s10051-024-00821-1</enrichment>
    <enrichment key="opus.doi.autoCreate">false</enrichment>
    <enrichment key="opus.urn.autoCreate">true</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Keerthi Dorai Swamy Reddy</author>
    <author>Eduardo Pérez</author>
    <author>Andrea Baroni</author>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Steffen Marschmeyer</author>
    <author>Mirko Fraschke</author>
    <author>Marco Lisker</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <collection role="ddc" number="006">Spezielle Computerverfahren</collection>
    <collection role="ddc" number="621">Angewandte Physik</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <collection role="green_open_access" number="4">Hybrid Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1970/s10051-024-00821-1.pdf</file>
  </doc>
</export-example>
