<?xml version="1.0" encoding="utf-8"?>
<export-example>
  <doc>
    <id>1567</id>
    <completedYear>2022</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume>14</volume>
    <type>article</type>
    <publisherName>Elsevier</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Etch mechanism of an Al₂O₃ hard mask in the Bosch process</title>
    <abstract language="eng">The etching of high aspect ratio structures in silicon via the Bosch process is essential in modern technologies such as microelectromechanical systems (MEMS) and through‑silicon vias (TSV) fabrication. The process can be very demanding on the mask selectivity due to long etching times, and it has been shown that an Al2O3 hard mask is very suitable in this regard, as it offers significantly higher selectivity compared to the conventional SiO2 or resist masks. In this work, we employ a combination of Scanning Electron Microscopy (SEM), Spectroscopic Ellipsometry (SE) and X-Ray Photoelectron Spectroscopy (XPS) depth profiling to scrutinize the Al2O3 mask etching mechanism and therefore the origin of the extraordinary high selectivity. We demonstrate that by increasing the passivation step time, a thicker fluorocarbon polymer layer is formed on the Al2O3, and Al2O3 is then removed with a minuscule average etch rate of  0.01 nm/min. XPS depth profiling reveals that during Deep Reactive Ion Etching (DRIE) using the Bosch process, an AlFx layer is formed between the polymer and Al2O3. As AlFx is non-volatile, it requires sputtering to be removed. If the polymer layer is thick enough to attenuate the incoming ions such that their energy is not sufficient to lead to desorption of AlFx, such as when using a longer passivation time, the mask is not eroded. By investigating the surface after different amounts of DRIE cycles, we also obtained information about the formation rate of AlFx and the changes in the Al2O3 and polymer thicknesses over the course of a DRIE process. These findings further expand the knowledge of DRIE and can help process engineers to tailor the processes accordingly.</abstract>
    <parentTitle language="eng">Micro and Nano Engineering</parentTitle>
    <identifier type="issn">2590-0072</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-15678</identifier>
    <enrichment key="opus.import.date">2022-01-10T07:44:15+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="opus.import.file">filename=phpRktIKx</enrichment>
    <enrichment key="opus.import.checksum">abd0762fd849a9ba7e617fff4ef6161c</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1016/j.mne.2021.100102</enrichment>
    <enrichment key="SourceTitle">Drost, M., Marschmeyer, D., Fraschke, M., Fursenko, O., Bärwolf, F., Costina, I., … Lisker, M. (2022). Etch mechanism of an Al2O3 hard mask in the Bosch process. Micro and Nano Engineering, 14, 100102. doi:10.1016/j.mne.2021.100102</enrichment>
    <licence>Creative Commons - CC BY-NC-ND - Namensnennung - Nicht kommerziell - Keine Bearbeitungen 4.0 International</licence>
    <author>Martin Drost</author>
    <author>Steffen Marschmeyer</author>
    <author>Mirko Fraschke</author>
    <author>Oksana Fursenko</author>
    <author>Florian Bärwolf</author>
    <author>Ioan Costina</author>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Marco Lisker</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Bosch process</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>deep reactive ion etching</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>aluminum oxide</value>
    </subject>
    <collection role="ddc" number="620">Ingenieurwissenschaften und zugeordnete Tätigkeiten</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <collection role="green_open_access" number="1">Gold Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1567/1-s2.0-S259000722100023X-main.pdf</file>
  </doc>
  <doc>
    <id>1769</id>
    <completedYear>2023</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue>4</issue>
    <volume>41</volume>
    <type>article</type>
    <publisherName>American Vacuum Society (AVS)</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Plasma-enhanced atomic layer deposition of silicon nitride for front-end-of-line applications</title>
    <abstract language="eng">SiN deposition at low temperatures using the plasma-enhanced atomic layer deposition (PEALD) process is gaining momentum. A high-quality SiN layer deposited using a lower thermal budget and low wet etch rates are desired for front-end-of-line applications in semiconductor industries. In this study, deposition of PEALD SiN is investigated by utilizing a highly reactive trisilylamine silicon precursor and three different reaction partners for a nitrogen precursor. The quality of PEALD SiN layers is compared with the reference standard, low-pressure chemical vapor deposition SiN layers. The properties of different SiN layers are interpreted using FTIR and XPS material characterization techniques. Furthermore, the wet etch rates of as-deposited and annealed PEALD SiN layers are investigated. Finally, the conformality of PEALD SiN layers is assessed in trench and horizontal high aspect ratio structures.</abstract>
    <parentTitle language="eng">Journal of Vacuum Science &amp; Technology A</parentTitle>
    <identifier type="issn">0734-2101</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-17699</identifier>
    <enrichment key="opus.import.data">@article10.1116/6.0002424, author = Lisker, Marco and Kalishettyhalli Mahadevaiah, Mamathamba and Dorai Swamy Reddy, Keerthi, title = "Plasma-enhanced atomic layer deposition of silicon nitride for front-end-of-line applications", journal = Journal of Vacuum Science &amp; Technology A, volume = 41, number = 4, pages = 042406, year = 2023, month = 07, abstract = "SiN deposition at low temperatures using the plasma-enhanced atomic layer deposition (PEALD) process is gaining momentum. A high-quality SiN layer deposited using a lower thermal budget and low wet etch rates are desired for front-end-of-line applications in semiconductor industries. In this study, deposition of PEALD SiN is investigated by utilizing a highly reactive trisilylamine silicon precursor and three different reaction partners for a nitrogen precursor. The quality of PEALD SiN layers is compared with the reference standard, low-pressure chemical vapor deposition SiN layers. The properties of different SiN layers are interpreted using FTIR and XPS material characterization techniques. Furthermore, the wet etch rates of as-deposited and annealed PEALD SiN layers are investigated. Finally, the conformality of PEALD SiN layers is assessed in trench and horizontal high aspect ratio structures.", issn = 0734-2101, doi = 10.1116/6.0002424, url = https://doi.org/10.1116/6.0002424, eprint = https://pubs.aip.org/avs/jva/article-pdf/doi/10.1116/6.0002424/18030845/042406_1_6.0002424.pdf,</enrichment>
    <enrichment key="opus.import.dataHash">md5:c1ef18492ea19222e7ca9f63524709cc</enrichment>
    <enrichment key="opus.import.date">2023-07-14T10:20:20+00:00</enrichment>
    <enrichment key="opus.import.file">/tmp/phplTAwBP</enrichment>
    <enrichment key="opus.import.format">bibtex</enrichment>
    <enrichment key="opus.import.id">64b1216445ba76.25744945</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1116/6.0002424</enrichment>
    <enrichment key="SourceTitle">Marco Lisker, Mamathamba Kalishettyhalli Mahadevaiah, Keerthi Dorai Swamy Reddy; Plasma-enhanced atomic layer deposition of silicon nitride for front-end-of-line applications. Journal of Vacuum Science &amp; Technology A 1 July 2023; 41 (4): 042406.</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Marco Lisker</author>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Keerthi Dorai Swamy Reddy</author>
    <collection role="ddc" number="620">Ingenieurwissenschaften und zugeordnete Tätigkeiten</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="green_open_access" number="4">Hybrid Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1769/042406_1_6.0002424.pdf</file>
  </doc>
  <doc>
    <id>1970</id>
    <completedYear>2024</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume>97</volume>
    <type>article</type>
    <publisherName>Springer Nature</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Optimization of technology processes for enhanced CMOS-integrated 1T-1R RRAM device performance</title>
    <abstract language="eng">Implementing artificial synapses that emulate the synaptic behavior observed in the brain is one of the most critical requirements for neuromorphic computing. Resistive random-access memories (RRAM) have been proposed as a candidate for artificial synaptic devices. For this applicability, RRAM device performance depends on the technology used to fabricate the metal–insulator–metal (MIM) stack and the technology chosen for the selector device. To analyze these dependencies, the integrated RRAM devices in a 4k-bit array are studied on a 200 mm wafer scale in this work. The RRAM devices are integrated into two different CMOS transistor technologies of IHP, namely 250 nm and 130 nm and the devices are compared in terms of their pristine state current. The devices in 130 nm technology have shown lower number of high pristine state current devices per die in comparison to the 250 nm technology. For the 130 nm technology, the forming voltage is reduced due to the decrease of HfO₂ dielectric thickness from 8 nm to 5 nm. Additionally, 5% Al-doped 4 nm HfO₂ dielectric displayed a similar reduction in forming voltage and a lower variation in the values. Finally, the multi-level switching between the dielectric layers in 250 nm and 130 nm technologies are compared, where 130 nm showed a more significant number of conductance levels of seven compared to only four levels observed in 250 nm technology.</abstract>
    <parentTitle language="eng">The European Physical Journal B : Condensed Matter and Complex Systems</parentTitle>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-19701</identifier>
    <enrichment key="opus.import.date">2024-12-03T07:25:21+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1140/epjb/s10051-024-00821-1</enrichment>
    <enrichment key="SourceTitle">Dorai Swamy Reddy, K., Pérez, E., Baroni, A. et al. Optimization of technology processes for enhanced CMOS-integrated 1T-1R RRAM device performance. Eur. Phys. J. B 97, 181 (2024). https://doi.org/10.1140/epjb/s10051-024-00821-1</enrichment>
    <enrichment key="opus.doi.autoCreate">false</enrichment>
    <enrichment key="opus.urn.autoCreate">true</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Keerthi Dorai Swamy Reddy</author>
    <author>Eduardo Pérez</author>
    <author>Andrea Baroni</author>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Steffen Marschmeyer</author>
    <author>Mirko Fraschke</author>
    <author>Marco Lisker</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <collection role="ddc" number="006">Spezielle Computerverfahren</collection>
    <collection role="ddc" number="621">Angewandte Physik</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <collection role="green_open_access" number="4">Hybrid Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1970/s10051-024-00821-1.pdf</file>
  </doc>
  <doc>
    <id>1617</id>
    <completedYear>2022</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber/>
    <edition/>
    <issue>10</issue>
    <volume>11</volume>
    <type>article</type>
    <publisherName/>
    <publisherPlace>MDPI</publisherPlace>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Modulating the Filamentary-Based Resistive Switching Properties of HfO₂ Memristive Devices by Adding Al₂O₃ Layers</title>
    <abstract language="eng">The resistive switching properties of HfO₂ based 1T-1R memristive devices are electrically modified by adding ultra-thin layers of Al₂O₃ into the memristive device. Three different types of memristive stacks are fabricated in the 130 nm CMOS technology of IHP. The switching properties of the memristive devices are discussed with respect to forming voltages, low resistance state and high resistance state characteristics and their variabilities. The experimental I–V characteristics of set and reset operations are evaluated by using the quantum point contact model. The properties of the conduction filament in the on and off states of the memristive devices are discussed with respect to the model parameters obtained from the QPC fit.</abstract>
    <parentTitle language="eng">Electronics</parentTitle>
    <identifier type="issn">2079-9292</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-16172</identifier>
    <enrichment key="opus.import.date">2022-06-16T07:03:01+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="opus.import.file">filename=phpFK6bUR</enrichment>
    <enrichment key="opus.import.checksum">0b96b17d5de532d08553a414296bd1d8</enrichment>
    <enrichment key="SourceTitle">Kalishettyhalli Mahadevaiah, M.; Perez, E.; Lisker, M.; Schubert, M.A.; Perez-Bosch Quesada, E.; Wenger, C.; Mai, A. Modulating the Filamentary-Based Resistive Switching Properties of HfO2 Memristive Devices by Adding Al2O3 Layers. Electronics 2022, 11, 1540. https://doi.org/10.3390/electronics11101540</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.3390/electronics11101540</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Eduardo Pérez</author>
    <author>Marco Lisker</author>
    <author>Markus Andreas Schubert</author>
    <author>Emilio Perez-Bosch Quesada</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <collection role="ddc" number="620">Ingenieurwissenschaften und zugeordnete Tätigkeiten</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <collection role="green_open_access" number="1">Gold Open Access</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1617/electronics-11-01540-v2.pdf</file>
  </doc>
  <doc>
    <id>1802</id>
    <completedYear>2024</completedYear>
    <publishedYear/>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>177</pageFirst>
    <pageLast>190</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>bookpart</type>
    <publisherName>Springer International Publishing</publisherName>
    <publisherPlace>Cham</publisherPlace>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>1</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Integration of Memristive Devices into a 130 nm CMOS Baseline Technology</title>
    <abstract language="eng">The two main features of the memristive devices which makes them the promising candidates for neuromorphic applications are low power consumption and CMOS compatibility. The monolithic integration of memristive devices with CMOS circuitry paves the way for in-memory computing. This chapter focuses on the factors governing the CMOS integration process. Firstly, the influence of CMOS baseline technology selection on the memristor module is briefly discussed. Secondly, the selection of metal level interconnects and their effect on the memristive device performance is explained. Further, the widely used deposition technique for the CMOS compatible memristive switching layers is presented. Finally, the implementation of the optimized process for the fabrication of the memristive module and its influence on the device performance is presented in terms of electrical characterization results.</abstract>
    <parentTitle language="eng">Bio-Inspired Information Pathways: From Neuroscience to Neurotronics</parentTitle>
    <identifier type="isbn">978-3-031-36705-2</identifier>
    <identifier type="urn">urn:nbn:de:kobv:526-opus4-18029</identifier>
    <enrichment key="opus.import.date">2023-09-26T08:08:29+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">sword</enrichment>
    <enrichment key="SourceTitle">Mahadevaiah, M.K. et al. (2024). Integration of Memristive Devices into a 130 nm CMOS Baseline Technology. In: Ziegler, M., Mussenbrock, T., Kohlstedt, H. (eds) Bio-Inspired Information Pathways. Springer Series on Bio- and Neurosystems, vol 16. Springer, Cham. https://doi.org/10.1007/978-3-031-36705-2_7</enrichment>
    <enrichment key="DOI_VoR">https://doi.org/10.1007/978-3-031-36705-2_7</enrichment>
    <licence>Creative Commons - CC BY - Namensnennung 4.0 International</licence>
    <author>Mamathamba Kalishettyhalli Mahadevaiah</author>
    <author>Marco Lisker</author>
    <author>Mirko Fraschke</author>
    <author>Steffen Marschmeyer</author>
    <author>Eduardo Pérez</author>
    <author>Emilio Perez-Bosch Quesada</author>
    <author>Christian Wenger</author>
    <author>Andreas Mai</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>CMOS compatibility</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>CMOS integration</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>memristive device</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>pristine current</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>resistive switching</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>thermal budget</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>encapsulation</value>
    </subject>
    <collection role="ddc" number="621">Angewandte Physik</collection>
    <collection role="institutes" number="">Fachbereich Ingenieur- und Naturwissenschaften</collection>
    <collection role="open_access" number="">open_access</collection>
    <collection role="Import" number="import">Import</collection>
    <thesisPublisher>Technische Hochschule Wildau</thesisPublisher>
    <file>https://opus4.kobv.de/opus4-th-wildau/files/1802/978-3-031-36705-2_7.pdf</file>
  </doc>
</export-example>
