@article{SteglichMaiVillringeretal.2021, author = {Steglich, Patrick and Mai, Christian and Villringer, Claus and Dietzel, Birgit and Bondarenko, Siegfried and Ksianzou, Viachaslau and Villasmunta, Francesco and Zesch, Christoph and Pulwer, Silvio and Burger, Martin and Bauer, Joachim and Heinrich, Friedhelm and Schrader, Sigurd and Vitale, Francesco and De Matteis, Fabio and Prosposito, Paolo and Casalboni, Mauro and Mai, Andreas}, title = {Silicon-organic hybrid photonics: an overview of recent advances, electro-optical effects and CMOS integration concepts}, series = {Journal of Physics: Photonics}, volume = {3}, journal = {Journal of Physics: Photonics}, number = {2}, issn = {2515-7647}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:526-opus4-13882}, year = {2021}, abstract = {In recent decades, much research effort has been invested in the development of photonic integrated circuits, and silicon-on-insulator technology has been established as a reliable platform for highly scalable silicon-based electro-optical modulators. However, the performance of such devices is restricted by the inherent material properties of silicon. An approach to overcoming these deficiencies is to integrate organic materials with exceptionally high optical nonlinearities into a silicon-on-insulator photonic platform. Silicon-organic hybrid photonics has been shown to overcome the drawbacks of silicon-based modulators in terms of operating speed, bandwidth, and energy consumption. This work reviews recent advances in silicon-organic hybrid photonics and covers the latest improvements to single components and device concepts. Special emphasis is given to the in-device performance of novel electro-optical polymers and the use of different electro-optical effects, such as the linear and quadratic electro-optical effect, as well as the electric-field-induced linear electro-optical effect. Finally, the inherent challenges of implementing non-linear optical polymers on a silicon photonic platform are discussed and a perspective for future directions is given.}, language = {en} } @article{VillasmuntaHeiseBreiteretal.2026, author = {Villasmunta, Francesco and Heise, Patrick and Breiter, Manuela and Schrader, Sigurd and Schenk, Harald and Regehly, Martin and Mai, Andreas}, title = {Monolithically Integrated Optical Through-Silicon Waveguides for 3D Chip-to-Chip Photonic Interconnects}, series = {IEEE Journal of Selected Topics in Quantum Electronics}, volume = {32}, journal = {IEEE Journal of Selected Topics in Quantum Electronics}, number = {2}, publisher = {IEEE}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:526-opus4-20828}, year = {2026}, abstract = {The scaling limitations of electrical interconnects are driving the demand for efficient optical chip-to-chip links. We report the first monolithic integration of air-clad optical through-silicon waveguides in silicon, fabricated via Bosch and cryogenic deep reactive-ion etching. Rib, single-bridge, and double-bridge designs with 50 μm cores and up to 150 μm propagation lengths have been evaluated. Cryogenic-etched rib waveguides achieve the highest median transmission (66\%, -1.80 dB), compared to Bosch-etched ribs (62\%, -2.08 dB). Across all geometries, 3 dB alignment windows range from 9.3 μm to 49.2 μm, with Bosch-etched double-bridge waveguides providing the broadest tolerance. We show that geometric fidelity outweighs sidewall roughness for transmission and alignment in these large-core, multimode optical through-silicon waveguides. This technology provides a scalable, complementary metal-oxide semiconductor-compatible pathway toward 3D photonic interconnects.}, language = {en} } @article{BauerHeinrichVillasmuntaetal.2025, author = {Bauer, Joachim and Heinrich, Friedhelm and Villasmunta, Francesco and Villringer, Claus and Reck, Johanna and Peters, Sven and Treffer, Alexander and Kuhnt, Christian and Marschmeyer, Steffen and Fursenko, Oksana and Stolarek, David and Mai, Andreas and Regehly, Martin}, title = {Reflectometric method for measuring residual oxides in through-silicon vias for 3D chip integration}, series = {Optics Express}, volume = {33}, journal = {Optics Express}, number = {15}, publisher = {Optica}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:526-opus4-20633}, pages = {32175 -- 32189}, year = {2025}, abstract = {A significant aspect of fabricating 3D chip architectures is ensuring proper contact between the different layers of the chip, which often requires removing the underside of isolation layers before filling vias with conductive material. Currently, scanning electron microscopy is the established method for investigating such structures. In this paper, we propose a rapid, non-destructive optical analysis technique for the simultaneous measurement of through-silicon vias (TSV) depths, silicon wafer thickness, and residual oxide thickness. The proposed method utilizes Fourier peak shift analysis (FPSA) of reflectance measurements in the near-infrared (1200 nm—2200 nm) spectral regions. The application of FPSA to representative samples taken from a commercial TSV integration process for MEMS and CMOS fabrication demonstrated good agreement with reference scanning electron microscopy measurements, confirming the feasibility of the method for in-line and in-situ metrology. The results indicate that FPSA has great potential for real-time process monitoring and control during 3D chip manufacturing.}, language = {en} } @article{BauerFursenkoMarschmeyeretal.2019, author = {Bauer, Joachim and Fursenko, Oksana and Marschmeyer, Steffen and Heinrich, Friedhelm and Villasmunta, Francesco and Villringer, Claus and Zesch, Christoph and Schrader, Sigurd}, title = {Spectroscopic reflectometry for characterization of Through Silicon Via profile of Bosch etching process}, series = {Journal of Vacuum Science \& Technology B}, volume = {37}, journal = {Journal of Vacuum Science \& Technology B}, number = {6}, publisher = {American Vacuum Society (AVS)}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:526-opus4-16093}, year = {2019}, abstract = {Through Silicon Via (TSV) technology is a key in 3D integration of circuits by the creation of interconnects using vias, which go through the full silicon wafer. Typically, a highly-selective Bosch Si etch process is used. It is characterized by a high etch rate at a high aspect ratio, whereby scallops on the sidewalls are generated. In this work, square via arrays with dimensions from 3 to 50 μm and up to 300 μm depth were fabricated and analyzed by spectroscopic reflectometry. The reflectometric data are compared to simulations by a novel theoretical approach. In order to simulate the reflectance spectra of TSV arrays, a combination of 2D and 3D rigorous coupled wave analysis was applied. Besides the via depth, the sidewall angle and the corner radius of the bottom profile were considered in the model. The general requirements on spectral resolution in TSV metrology are discussed.}, language = {en} }