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Safety assurance is a major challenge in the design of today's complex embedded systems and future Cyber-physical systems. Especially changes in a system's architectural design invalidate former safety analyses and require an adaptation of related safety analysis models in order to restore consistency. In this work, we present an approach for automatically generating mappings between failure ports in compositional safety analysis models. This way, automatic and system-wide safety analyses are enabled that can be easily repeated after making modifications to the system's architecture. We demonstrate the feasibility of our approach using a case study from the automotive domain.
Safety assurance is a major challenge in the design of complex embedded and Cyber-physical Systems. Especially, changes and adoptions during the design or run-time of an embedded system invalidate former safety analyses and require an adaptation of the system's safety analysis models. In this paper, we present a methodology to fill up empty safety analysis artifacts in component fault trees using so-called inner port dependency traces to describe failure propagation. Thus, enabling a imprecise but rapid safety analysis of an entire system at early development stages or during system run-time for the automated certification of Cyber-physical Systems. We evaluate our approach using case study from the automotive domain.
Identifying drawbacks or insufficiencies in terms of safety is important also in early development stages of safety critical systems. In industry, development artefacts such as components or units, are often reused from existing artefacts to save time and costs. When development artefacts are reused, their existing safety analysis models are an important input for an early safety assessment for the new system, since they already provide a valid model. Component fault trees support such reuse strategies by a compositional horizontal approach. But current development strategies do not only divide systems horizontally, e.g., By encapsulating different functionality into separate components and hierarchies of components, but also vertically, e.g. Into software and hardware architecture layers. Current safety analysis methodologies, such as component fault trees, do not support such vertical layers. Therefore, we present here a methodology that is able to divide safety analysis models into different layers of a systems architecture. We use so called Architecture Layer Failure Dependencies to enable component fault trees on different layers of an architecture. These dependencies are then used to generate safety evidence for the entire system and over all different architecture layers. A case study applies the approach to hardware and software layers.
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