Refine
Year of publication
Document Type
Is part of the Bibliography
- no (35)
Keywords
- AUTOSAR (2)
- Architecture Description Language (1)
- Goodness-of-fit (1)
- Model-Driven Development (1)
- Multi-Core (1)
- Multi-Objective Optimization (1)
- Multicore (1)
- Real-Time Systems (1)
- Real-time systems (1)
- Simulation (1)
Institute
Begutachtungsstatus
- peer-reviewed (4)
Forschungsbericht 2011 / Hochschule für Angewandte Wissenschaften - Fachhochschule Regensburg
(2011)
Partly Proportionate fair (Partly-Pfair) scheduling, which allows task migration at runtime and assigns each task processing time with regard to its weight, makes it possible to build highly efficient embedded multi-core systems. Due to its non-work-conserving behavior, which might leave the CPU idle even when tasks are ready to execute, tasks finish only shortly before their deadlines are reached. Benefits are lower task jitter, but additional workload, e.g. through interrupts, can lead to deadline violations. In this paper we present a work-conserving extension of Partly-Pfair scheduling, called PERfair scheduling and the algorithm P-ERfair-PD2 which applies Pfair modifications used for Partly-Pfair on the concept of ERfairness and PD2 policies. With a simulation based schedulability examination we show for multiple time base (MTB) task sets that P-ERfair- PD2 has the same performance as Partly-Pfair-PD2. Additionally, we show that P-ERfair- PD2 has a much higher robustness against perturbations, and therefore it is well suited for embedded domains, especially for the Automotive domain.
Eingebettete Systeme unterliegen neben den funktionalen Anforderungen besonders nichtfunktionalen Qualitätsanforderungen wie Effizienz, Zuverlässigkeit und Echtzeitfähigkeit. Mit steigendem Bedarf an Rechenkapazität können bisherige Konzepte zur Leistungssteigerung von Singlecore-Systemen jedoch nicht mehr eingesetzt werden - der Umstieg auf Multicore-Systeme wird erforderlich. Im zweiten Teil dieser Arbeit wird ein simulationsbasierter Ansatz zum Vergleich von Multicore-Scheduling-Algorithmen vorgestellt, mit dem Algorithmen für Multicore-Systeme mit voller Migration und dynamischer Task-Priorität untersucht werden. Wir erweitern diesen Ansatz um ein Verfahren zur Untersuchung einer Tasksetmenge mit stochastisch beschriebenen Eigenschaften und vergleichen ihn mit den im Teil 1 beschriebenen Algorithmen BinPacking-EDF und P-ERfair-PD² für eine Gruppe von Automotive Powertrain Systemen.
Proportionate fair (Pfair) scheduling, which allows task migration at runtime and assigns each task processing time with regard to its weight, is one of the most efficient group of SMP multiprocessor scheduling algorithms known up to now. Drawbacks are tight requirements to the task system, namely the restriction to periodic task systems with synchronized task activation, quantized task execution time, and implicit task deadline. Most likely, a typical embedded real-time system does not fulfill these requirements. In this paper we address violations of these requirements. For heterogeneous task systems, we define the multiple time base (MTB) task system, which is a less pessimistic model than sporadic task systems and is used for automotive systems. We apply the concept of Pfair scheduling to MTB task systems, called partly proportionate fair (Partly-Pfair) scheduling. The restrictions on MTB task systems required for Partly-Pfair ness are weaker than restrictions on periodic task systems required for Pfair ness. In a simulation based study we examined the performance of Partly-Pfair-PD and found it capable to schedule feasible MTB task sets causing a load of up to 100% of the system capacity.
Partitionierungs-Scheduling von Automotive Restricted Tasksystemen auf Multiprozessorplattformen
(2009)
Eingebettete Systeme unterliegen neben den funktionalen Anforderungen besonders nicht funktionalen Qualitätsanforderungen wie Effizienz, Zuverlässigkeit und Echtzeitfähigkeit. Mit steigendem Bedarf an Rechenkapazität können bisherige Konzepte zur Leistungssteigerung von Singlecore-Systemen jedoch nicht mehr eingesetzt werden – der Umstieg auf Multicore-Systeme wird erforderlich. Im ersten Teil dieser Arbeit werden eine mögliche Prozessorarchitektur für zukünftige Automotive Multicore-Systeme und die Abstraktion der Software für diese Systeme vorgestellt. Nach einer Klassifkation von Multicore-Scheduling-Algorithmen präsentieren wir exemplarisch einen Algorithmus mit statischer Taskallokation und einen Algorithmus mit dynamischer Taskallokation. Bei beiden Algorithmen handelt es sich um eine Überführung theoretisch behandelter Algorithmen auf Automotive Systeme.
Towards the Derivation of Guidelines for the Deployment of Real-Time Tasks on a Multicore Processor
(2014)
The deployment of automotive software on a multicore processor includes the task of mapping executables to cores. Given the number of possible solutions, integrators have to solve a complex problem. Considering multiple, often conflicting goals like minimizing task response times and memory consumption, complexity further increased with the advent of multicore processors. We present a model-based approach for deriving design rules supporting integrators with statically mapping tasks to a multicore ECU. First, an evolutionary algorithm is used to sample the design space. For each sample, a model-based analysis is performed, resulting in the required fitness values according to the system metric objectives. Finally, subsets of the sample population are used to derive deployment guidelines by evaluating similarities between highly ranked solutions. This reduces the number of solutions to be considered by the integrators by orders of magnitude. In a case-study, we demonstrate the developed approach on an artificial automotive engine management system.
The shift from single-core to multi-core processors in real-time embedded systems leads to communication based effects on timing such as inter-core communication delays and blocking times. Moreover, the complexity of the scheduling problem increases when multi-core processors are used. In priority-based-scheduling, a fixed priority assignment is used in order to enable predictable behavior of the system. Predictability means that the system has to be analyzable which allows the detection of problems coming from scheduling decisions. For fixed priority scheduling in multi-core real-time embedded systems, a proper task priority assignment has to be done in a way that the system has minimal effects on timing. In this paper, we present an approach for finding near-optimal solutions for task priority assignment and the preemption/cooperation problem. A genetic algorithm is hereby used to create priority assignment solutions. A timing simulator is used for evaluation of each solution regarding real-time properties, memory consumption and communication overhead. In a case study we demonstrate that the proposed approach performs better than well known and single-core optimal heuristics for relatively complex systems.
We present in this paper a new lock-based resource sharing protocol PWLP (Preemptable Waiting Locking Protocol) for embedded multi-core processors. It is based on the busy-wait model and works with non-preemptive critical sections while task may be preempted by tasks with a higher priority when waiting for resources. Our protocol can be applied in partitioned as well as global scheduling scenarios, in which task-fix, job-fix or dynamically assigned priorities may be used. Furthermore, the PWLP permits nested requests to shared resources. Finally, we present a case study based on event-based simulations in which the FMLP (Flexible Multiprocessor Locking Protocol) and the proposed PWLP are compared.
Extended Task Priority and Preemptability Optimization in Real-Time Multi-Core Embedded Systems
(2014)
We present a model-based optimization approach for the task allocation problem in embedded multi-core systems. The information therefore is obtained from a system description in AUTOSAR and runtime measurements of the runnables in hardware traces. Based on this an initial software partitioning of runnables to tasks is created. We then use a genetic algorithm to create and evaluate solutions to the task allocation problem. Each solution is hereby evaluated using a discrete event-based simulation, which allows the evaluation with regard to real-time properties, resource consumption and data-communication overhead. The significance of our approach is then shown in a case-study. There, we optimize the task allocation of an embedded system, whose complexity is comparable to that of an actual system, on a multi-core processor. Finally, the results of the optimization are transferred to an ECU Configuration Description to enable further development in compliance with the AUTOSAR methodology.
Traditional methods rely on Static Timing Analysis techniques to compute the Worst Case Response Time for tasks in real-time systems. Multi-Core real-time systems are faced up with concurrent task executions, semaphore accesses, and task migrations where it may be difficult to obtain the worst case upper bound. A new three staged probabilistic estimation concept is presented. Worst Case Response Times are estimated for tasksets which consist of tasks with multiple time bases. The concept involves data generation with sample classification and sample size equalization, model fit and Worst Case Response Time estimation on the basis of extreme value distribution models. A Generalized Pareto Distribution model fit method which includes threshold detection and parameter estimation is also presented. Sample classification in combination with the new Generalized Pareto Distribution model fit method allows to estimate Worst Case Response Times with low pessimism ranges compared to estimation methods that uses the Generalized Pareto or the Gumbel max distribution without sample classification.
With the availability of the AUTOSAR standard, model-driven methodologies are becoming established in theautomotive domain. However, the process of creating models ofexisting system components is often difficult and time consuming, especially when legacy code has to be re-used or informationabout the exact timing behavior is needed. In order to tackle thisreverse engineering problem, we present CoreTAna, a novel toolthat derives an AUTOSAR compliant model of a real-time systemfrom a dynamic analysis of its trace recordings. This paper givesan overview of CoreTAna's current features and discusses itsbenefits for reverse engineering.
Der Embedded Markt stellt sich auf eine neue Herausforderung ein: denUmstieg von Singlecore- auf Multicore-Prozessorsysteme. Dabei soll dieUmsetzung der Norm ISO 26262 die Funktionale Sicherheit der elektri-schen und elektronischen Systeme im Kraftfahrzeug gewährleisten. In diesem Beitrag betrachten die Hochschule Regensburg und die TÜV SüdAutomotive GmbH das Scheduling eines Echtzeitsystems als ein sicher-heitsrelevantes Sub-System.