Implementation of a dual-phase lock-in amplifier on a TMS320C5515 digital signal processor

  • A digital dual-phase lock-in amplifier that is capable to run on a low-cost, low-power platform comprising a 16-bit fixed-point digital signal processor was developed. This is achieved by a set of optimised digital filters including an exponential averager to adjust the time constant of the overall filter. The reference frequency is generated using a direct digital synthesis source utilising angleA digital dual-phase lock-in amplifier that is capable to run on a low-cost, low-power platform comprising a 16-bit fixed-point digital signal processor was developed. This is achieved by a set of optimised digital filters including an exponential averager to adjust the time constant of the overall filter. The reference frequency is generated using a direct digital synthesis source utilising angle decomposition with a resolution of 1 Hz. The digital lock-in algorithm is described and the performance of the algorithm is analysed. The experimental results show that the developed lock-in amplifier achieves similar performance to a commercially available lock-in amplifier.show moreshow less

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Metadaten
Author:Matthias Hofmann, Rudolf BierlOTH, Thomas RückOTHORCiD
DOI:https://doi.org/10.1109/EDERC.2012.6532217
Parent Title (English):Proceedings of the 5th European DSP Education and Research Conference (EDERC), 13-14 Sept. 2012, Amsterdam
Document Type:conference proceeding (article)
Language:English
Year of first Publication:2012
Release Date:2021/03/26
Institutes:Fakultät Angewandte Natur- und Kulturwissenschaften
Fakultät Angewandte Natur- und Kulturwissenschaften / Sensorik-Applikationszentrum (SappZ)
research focus:Materialien und Produktion
Frontdoor-URL:https://opus4.kobv.de/opus4-oth-regensburg/1569
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