Design and Optimization of High-Voltage CMOS Devices Compatible wih a Standard 5V CMOS Technology

  • High-voltage n- and p-MOSFETs fully compatible with a standard 5 V CMOS technology have been designed, optimized, and fabricated. No process changes are required. By modifying the logical equations generating one of the physical masks from the design masks, a p-type buffer region for the high-voltage p-MOS was easily implemented. This modification does not affect the low-voltage part of theHigh-voltage n- and p-MOSFETs fully compatible with a standard 5 V CMOS technology have been designed, optimized, and fabricated. No process changes are required. By modifying the logical equations generating one of the physical masks from the design masks, a p-type buffer region for the high-voltage p-MOS was easily implemented. This modification does not affect the low-voltage part of the circuits. These high-voltage devices have been used successfully as output drivers in semicustom arrays, and as building blocks for custom low- to high-voltage output interfaces. Aspects of reliability, device protection, and circuit design techniques are addressed.show moreshow less

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Metadaten
Author:Michel Declerq, F. Clément, Martin J. W. Schubert, Adnan Harb, Michel Dutoit
DOI:https://doi.org/10.1109/CICC.1993.590766
ISBN:0-7803-0826-3
Parent Title (English):Proceedings of IEEE Custom Integrated Circuits Conference, May 9-12 1993, San Diego, CA, USA
Document Type:conference proceeding (article)
Language:English
Year of first Publication:1993
Release Date:2021/04/01
First Page:24.6.1
Last Page:24.6.4
Institutes:Fakultät Elektro- und Informationstechnik
Fakultät Elektro- und Informationstechnik / Labor Elektronik
Publication:Externe Publikationen
research focus:Materialien und Produktion
Frontdoor-URL:https://opus4.kobv.de/opus4-oth-regensburg/1169
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