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Mixed Analog-Digital Signal Modeling Using Event-Driven VHDL

  • A method for solving networks containing generic analog components such as resistors, capacitors and inductors onan event driven time axis using digital VHDL is presented. The components are modeled as complex state machines communicating with their neighbors using INOUT type ports. The method takes advantage of simulation deltas to iterate without simulation-time consumption. A limited range of implicit equations can be solved this way.

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Metadaten
Author:Martin J. W. Schubert
URL / DOI:http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=50F6F0DA594FB90976CC1474581BC139?doi=10.1.1.508.3657&rep=rep1&type=pdf
Parent Title (English):X Brazilian Symposium on Integrated Circuit Design (SBCCI'97), August 25-27 1997, Porto Alegre, Brazil
Document Type:conference proceeding (article)
Language:English
Year of first Publication:1997
Release Date:2021/04/01
First Page:77
Last Page:86
Institutes:Fakultät Elektro- und Informationstechnik
Fakultät Elektro- und Informationstechnik / Labor Elektronik
research focus:Produktion und Systeme