TY - CHAP A1 - Langer, Tobias A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - A Survey of Parallel Hard-Real Time Scheduling on Task Models and Scheduling Approaches T2 - ARCS 2017; 30th International Conference on Architecture of Computing Systems, 3-6 April 2017, Vienna, Austria N2 - The trend towards multi-core systems becomes increasinglyomnipresentandhasalreadyreachedhardreal-time systems. In the recent years more and more researchers tackle the problem of scheduling parallel tasks with real-time constraints. We present a discussion of these recent approaches to hard real-time scheduling tasks consisting of multiple threads. We identify categories in scheduling mechanisms and task systems and discuss their features, as well as the research already achieved in their ???elds. In the domain of task models we identi???ed the gang constrained task model, the order constrained task model and the unconstrained task model. These task models differ regardingtheamountandtypeofthreadexecutionconstraints, which can be expressed using the model. Regarding scheduling algorithms, we identi???ed transformation based and nontransformation based scheduling schemes. The former rely on off-line task transformation, whereas the latter doesn???t require any prior information about task structures. The presented classi???cations show, that applied scheduling algorithms mostly are not restricted to certain task models, but that they are applied quite independently. Y1 - 2017 UR - https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7948560 ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Mottok, Jürgen T1 - A Survey of Fault Tolerance Approaches at Different Architecture Levels T2 - 30th International Conference on Architecture of Computing Systems, ARCS 2017, 3-6 April 2017, Vienna, Austria N2 - In the recent years the development trends for computing platforms moved to multicore systems. Associated with this trend, feature sizes decreased with each new hardware generation and consequently led to a rise of transient and permanent error frequency in memory and CPUs. In this context, researchers presented several approaches which exploit the inherent redundancy of multicore platforms to provide fault tolerance. We present a discussion of fault tolerance approaches based on redundancy at different levels of architecture regarding theirsphereofreplication,performanceaswellaserrordetection and recovery capability. Y1 - 2017 UR - https://ieeexplore.ieee.org/document/7948561 SP - 1 EP - 9 ER -