TY - CHAP A1 - Reuter, Rebecca A1 - Hauser, Florian A1 - Muckelbauer, Daniel A1 - Stark, Theresa A1 - Antoni, Erika A1 - Mottok, Jürgen A1 - Wolff, Christian T1 - Using augmented reality in software engineering education? First insights to a comparative study of 2D and AR UML modeling T2 - Proceedings of the 52nd Hawaii International Conference on System Sciences (HICSS) and 31st Conference on Software Engineering Education and Training (CSEE&T), January 8 - 11, 2019 Grand Wailea, Hawaii N2 - Although there has been much speculation about the potential of Augmented Reality (AR) in teaching for learning material, there is a significant lack of empirical proof about its effectiveness and implementation in higher education. We describe a software to integrate AR using the Microsoft Hololens into UML (Unified Modeling Language) teaching. Its user interface is laid out to overcome problems of existing software. We discuss the design of the tool and report a first evaluation study. The study is based upon effectiveness as a metric for students performance and components of motivation. The study was designed as control group experiment with two groups. The experimental group had to solve tasks with the help of the AR modeling tool and the control group used a classic PC software. We identified tendencies that participants of the experimental group showed more motivation than the control group. Both groups performed equally well Y1 - 2019 U6 - https://doi.org/10.24251/HICSS.2019.938 SP - 7798 EP - 7807 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Knietzsch, Marco A1 - Hauser, Florian A1 - Mottok, Jürgen T1 - Supporting Abstraction Skills Using Augmented Reality? T2 - ITiCSE '19, Proceedings of the 2019 ACM Conference on Innovation and Technology in Computer Science Education, July 2019, Aberdeen Scotland UK N2 - We investigated the potential of augmented reality (AR) to enable visualization of abstract concepts and present the first iteration of a teaching experiment that evaluates the use of AR as support for abstraction skills. Students were confronted with the task to present and explain information to different groups of stakeholders at the example of a coffee machine. Results show that students find it helpful to have a visual app-prototype and especially one that can be disassembled in different levels. The main goal was to sensitize students for the need to think about and to abstract information for certain roles and perspectives. Y1 - 2019 U6 - https://doi.org/10.1145/3304221.3325562 ER - TY - CHAP A1 - Schreistetter, Stefan A1 - Hauser, Florian A1 - Reuter, Rebecca A1 - Jahn, Sabrina A1 - Mottok, Jürgen T1 - Using Eye Tracking Data to analyze students’ tasks solving behavior in classroom contexts T2 - 12th International Conference of Education, Research and Innovation (ICERI 2019), Conference Proceedings, 2019, Seville (Spain) Y1 - 2019 SN - 978-84-09-14755-7 U6 - https://doi.org/10.21125/iceri.2019.1473 SN - 2340-1095 SP - 6087 EP - 6096 ER - TY - CHAP A1 - Jahn, Sabrina A1 - Gold-Veerkamp, Carolin A1 - Reuter, Rebecca A1 - Mottok, Jürgen A1 - Abke, Jörg T1 - Secure Software Engineering in academic education: students’ sreconceptions of it security T2 - 12th International Conference of Education, Research and Innovation (ICERI2019), 11-13 November 2019, Seville, Spain Y1 - 2019 U6 - https://doi.org/10.21125/iceri.2019.1624 SP - 6825 EP - 6834 ER - TY - CHAP A1 - Hauser, Florian A1 - Reuter, Rebecca A1 - Gegenfurtner, Andreas A1 - Gruber, Hans A1 - Mottok, Jürgen T1 - Eye movements in software modelling – what do they tell us about heuristics T2 - 12th International Conference of Education, Research and Innovation (ICERI 2019), Conference Proceedings, 2019, Seville (Spain) Y1 - 2019 SN - 978-84-09-14755-7 U6 - https://doi.org/10.21125/iceri.2019.1469 SP - 6064 EP - 6070 ER - TY - CHAP A1 - Steindl, Michael A1 - Mottok, Jürgen T1 - Optimizing Software Integration Testing by Considering Integration Testability and Test Complexity T2 - 10th IEEE Workshop on Intelligent Solutions in Embedded Systems, 2012, Klagenfurt, Austria Y1 - 2012 ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen ED - Pivec, M. ED - Gründler, J. T1 - An Integrated Puzzle Game for Learning Programming Based on Students Syntactical Errors T2 - 11th European Conference on Game-Based Learning, Oct 5 - Oct 6, 2017, Graz N2 - Practical implementations are important for understanding the concepts and principles of programming. Self-employed coding encourages learners to acquire learning content and fosters the theory-practice transfer. Thereby, the earners face various difficulties and obstacles. Misconceptions and faults accompany the learners’ coding process and result in non-executable coding artefacts. The integrated compiler of programming environments provides information concerning error messages that indicate incorrect coding constructs. Usually due to unspecific and generic formulation, learners find it hard to understand these error messages. Yet these observable errors give valuable information about the learner’s coding behaviour and indicate current problems. These provide a link for adopted and appropriate learning assistance during the coding process. In this work in progress paper, we present first assumptions in assisting learners’ understanding and correction of programming errors by a game-based learning method. Our first approach focuses on the integration of a puzzle game into a programming environment. The game content adjusts to the error messages based on the analysis of the learner’s log file. We suggest that the integration of this approach rises the learner’s motivation to self-employed error handling and the quality of learning programming. Y1 - 2017 PB - Academic Conferences and Publishing International ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen ED - Schoeberl, Martin ED - Hochberger, Christian ED - Uhrig, Sascha ED - Brehm, Jürgen ED - Pionteck, Thilo T1 - S 3DES - Scalable Software Support for Dependable Embedded Systems T2 - Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings N2 - Scalable Software Support for Dependable Embedded Systems (S3DES) achieves fault tolerance by utilizing spatial software-based triple modular redundancy for computational and voter processes on application level. Due to the parallel execution of the replicas on distinct CPU cores it makes a step towards software-based fault tolerance against transient and permanent random hardware errors. Additionally, the compliance with real-time requirements in terms of response time is enhanced compared to similar approaches. The replicated voters, the introduced mutual voter monitoring and the optimized arithmetic encoding allow the detection and compensation of voter failures without the utilization of backward recovery. Fault injection experiments on real hardware reveal that S3DES can detect and mask all injected data and program flow errors under a single fault assumption, whereas an uncoded voting scheme yields approx. 12% silent data corruptions in a similar experiment. Y1 - 2019 U6 - https://doi.org/10.1007/978-3-030-18656-2_2 SP - 15 EP - 27 PB - Springer CY - Cham ER - TY - CHAP A1 - Weiherer, Kerstin A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Software-Based Triple Modular Redundancy with Fault-Tolerant Replicated Voters T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - New computing-intensive applications such as assisted or highly automated driving are rapidly expanding the domain of safety-critical embedded systems, driven by the vision of the driverless car. This development makes it necessary to use high performance multi-core systems which are commercially available and provide more parallelism in terms of redundant execution units, however, at the cost of being less reliable. With the continuous down-scaling of semiconductor technology, computing hardware exhibits an increasing vulnerability against random hardware faults. Since these high-performance controller provide less or no hardware redundancy to ensure a safe execution of the application, software-only fault tolerance approaches are under current investigation. Our Scalable Software Support for Dependable Embedded Systems (S3DES) approach achieves fault tolerance by utilizing software-based triple modular redundancy for computational and optimized arithmetic encoded voter processes to ensure fault detection and error handling on application level. In S3DES voters are replicated to allow the compensation of voting failures. However, new challenges with regard to error propagation and multiple voting result outputs are introduced by this extension. We describe how mutual voter monitoring and threshold value checks could be used to establish a hierarchy among the replicated voters without re-introducing a reliability bottleneck in the sense of a single point of failure and resolve the aforementioned challenges. Y1 - 2019 UR - https://ieeexplore.ieee.org/abstract/document/8836210 SP - 1 EP - 8 ER - TY - CHAP A1 - Jahn, Sabrina A1 - Kaul, Nicolas A1 - Mottok, Jürgen T1 - Using or Misusing? Introducing Misuse Cases in a Software Engineering Course for Undergraduate Engineering Students T2 - ITiCSE '22 : Proceedings of the 27th ACM Conference on on Innovation and Technology in Computer Science Education, Vol 1: July 8 - 13, 2022, Dublin Ireland N2 - Today's cyberphysical systems are increasingly prone to misuse. To secure existing and future software systems, introducing concepts of IT-Security and Secure Software Engineering (SecSE) in Software Engineering (SE) courses is essential for academic education of future software engineers. This is not only important for computer science students, but also for engineering students studying topics of computing and SE. However, only little research exists on integrating these topics into traditional SE courses, especially for engineering students in non-computer science majors. To narrow this gap, this paper contributes with the design and evaluation of an exercise on modeling misuse cases alongside use cases, based on the inductive teaching method problem-based learning (PBL). The exercise is part of an educational design research investigating which learning content and teaching methods are suitable for integrating IT-Security and SecSE topics into traditional SE education of engineering students to convey factual knowledge as well as raise awareness and interest for both topics during software development. We present the integration of the exercise design into a traditional SE course for engineering students and its evaluation to examine its suitability. We evaluated the exercise design regarding the suitability of the design components, the learning content of misuse cases and the intended learning goals as well as its impact on students' motivation, and their interest in IT-security. The paper then presents indications on the feasibility and success of the exercise design for teaching misuse cases to engineering students and sparking their interest in IT-Security. KW - educational design research KW - mis-use case KW - problem-based learning KW - inductive teaching KW - engineering students KW - higher education KW - secure software engineering KW - IT-Security Y1 - 2022 U6 - https://doi.org/10.1145/3502718.3524823 SP - 491 EP - 497 PB - Association for Computing Machinery CY - New York, NY ER - TY - CHAP A1 - Reuter, Rebecca A1 - Jahn, Sabrina A1 - Figas, Paula A1 - Bartel, Alexander A1 - Mottok, Jürgen A1 - Hagel, Georg T1 - Learning Tasks for Software Engineering Education: An exemplary development of learning tasks for software engineering based on didactic function and knowledge type T2 - Proceedings of the 3rd European Conference of Software Engineering Education (ECSEE'18), JUne 2018, Seeon, Bavaria, Germany N2 - Learning tasks play an important role in education and especially in higher education. However, there is a significant lack in research regarding these in higher education. A learning task shows several characteristics, whereas the didactic function of a task is mostly considered. Two characteristics of learning tasks are focused in this paper: The didactic function and the type knowledge. Existing types of learning tasks are presented as well as a proposal for learning tasks in software engineering education that considers didactic functions, like elaboration, training or application and types of knowledge, i.e. factual, conceptual, procedural and metacognitive knowledge. This paper aims to serve as a guidance for lecturers who have the purpose to create learning tasks that address both characteristics -- the didactic function and the type of knowledge. Y1 - 2018 U6 - https://doi.org/10.1145/3209087.3209097 SP - 1 EP - 7 ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Mader, Ralph A1 - Mottok, Jürgen T1 - Challenges and Opportunities with Embedded Multicore Platforms BT - Spotlight on Real-Time and Dependability Concepts T2 - 9th European Congress Embedded Real Time Software and Systems (ERTS 2018), January 31st to Febraury 2nd 2018, Toulouse, France Y1 - 2018 UR - https://hal.archives-ouvertes.fr/hal-02156232/ ER - TY - CHAP A1 - Müller, L. A1 - Jahn, Sabrina A1 - Reuter, Rebecca A1 - Mottok, Jürgen ED - Chova, L. G. ED - Martínez, A. L. ED - Torres, I. C. T1 - A Task Design Concept For A Virtual Classroom For Requirements Engineering Education T2 - ICERI 2018 Proceedings, Seville, Spain Y1 - 2018 U6 - https://doi.org/10.21125/iceri.2018.1216 SP - 911 EP - 920 ER - TY - CHAP A1 - Seebauer, Stefan A1 - Jahn, Sabrina A1 - Mottok, Jürgen T1 - Escape Rooms for teaching IT-Security T2 - 12th International Conference of Education, Research and Innovation (ICERI2019), 11-13 November 2019, Seville, Spain Y1 - 2019 U6 - https://doi.org/10.21125/iceri.2019.1623 SP - 6815 EP - 6824 ER - TY - CHAP A1 - Krämer, Stefan A1 - Raab, Peter A1 - Mottok, Jürgen A1 - Racek, Stanislav T1 - Reliability analysis of real-time scheduling by means of stochastic simulation T2 - 2012 International Conference on Applied Electronics (AE 2012), Pilsen, Czech Republic, 5 - 7 September 2012 N2 - We present a simulation-based approach to reliability analysis combined with a schedulability analysis of software intensive embedded real-time systems. In such a system not only does the software execution have to be hardened against soft errors, e.g., by means of coded processing or diverse execution, but also the real-time requirements have still to be met in the presence of such error to guarantee a safe operation of the system. For that reason, the influence regarding the real-time characteristics of a given sporadic error with a certain error rate is analyzed by means of a Monte Carlo simulation. Different safety design patterns are introduced and compared. Furthermore, the impact on the schedulability of an embedded system is discussed. Y1 - 2012 SP - 151 EP - 156 ER - TY - CHAP A1 - Schumm, Michael A1 - Joseph, Saskia A1 - Schroll-Decker, Irmgard A1 - Niemetz, Michael A1 - Mottok, Jürgen T1 - Required competences in software engineering – pair programming as an instrument for facilitating life-long learning T2 - 15th International Conference on Interactive Collaborative Learning and 41st International Conference on Engineering Pedagogy, Villach N2 - The professional requirements in software engineering have become highly volatile due to the complexities of project development and rapid and innovative changes occurring in the field. Therefore, the development of inter-personal and social competences has gained central importance in the training of software developers. The following text will present a concept allowing to acquire competences by using Pair Programming as an instrument. Moreover, arrangements for learning and teaching will be presented facilitating the acquisition of these competences. By approaching the issue of competence acquisition on a technical as well as on an educational and social level, lifelong learning is facilitated and supported. Y1 - 2012 U6 - https://doi.org/10.1109/ICL.2012.6402229 ER - TY - CHAP A1 - Schmittner, Christoph A1 - Scharfenberg, Georg A1 - Mottok, Jürgen A1 - Strassmeier, Stefan A1 - Limmer, Thomas T1 - Analysis of the functional and electrical safety of charging stations T2 - 2nd Applied Research Conference 2012 (ARC 2012), 25./26. June 2012, Nuremberg N2 - The number of public charging stations for electric vehicles is rising. It's estimated that in 2014 more than 1.000.000 public charging stations will be installed worldwide. Currently there is no specific standard for Functional Safety and the standard for Electrical Safety is derived from standards for similar systems. The intent of this paper is to examine the existing safety architecture of mode 3 charging stations. First the standards for the charging process and the different modes are presented. Then a standard architecture for a mode 3 charging station, based on the IEC 61841, is described. After that a risk analysis of this model is performed and the electrical and Functional Safety of the architecture are analyzed. Both analyses are based on the general safety standards VDE 0100 and IEC 61508. After that possibilities for improvements and future challenges with Mode 4 charging are discussed. Y1 - 2012 SP - 80 EP - 85 ER - TY - CHAP A1 - Raab, Peter A1 - Racek, Stanislav A1 - Krämer, Stefan A1 - Mottok, Jürgen T1 - Reliability of Task Execution during Safe Software Processing T2 - 15th Euromicro Conference on Digital System Design, Cesme, Turkey N2 - This paper presents the reliability evaluation of task execution during safe software processing. The standard method of duplication in a safety-critical application can also be applied for tasks in a software system. But in addition to this, there is also the possibility for coded task processing to increase the reliability and availability of software. The presented analysis covers the reliability analysis of a single, a duplicated and a coded task by the technique of continuous time Markov processes. Markov processes are often used for the reliability evaluation of safety-critical systems. We introduce a method to describe the execution time of tasks by means of enhanced Markov models and their solution by numerical methods. KW - reliability analysis KW - continuous-time Markov process KW - error probability KW - Erlang-distribution Y1 - 2012 U6 - https://doi.org/10.1109/DSD.2012.110 SP - 84 EP - 89 ER - TY - JOUR A1 - Ostermeier, Daniel A1 - Mottok, Jürgen A1 - Knorr, Christine A1 - Huber, Michael ED - Mottok, Jürgen ED - Ziemann, Olaf T1 - Competence Atlas for Save and Green Road Vehicles in the Electro Mobility Cluster Regensburg JF - Applied Research Conference 2012 (ARC 2012) 25./26. June 2012, Nuremberg Y1 - 2012 SP - 86 EP - 92 ER - TY - CHAP A1 - Mottok, Jürgen T1 - Migration path for secure and economic smart power grid devices with transitional smart metering support T2 - 2nd Applied Research Conference 2012 (ARC 2012), 25./26. June 2012, Nuremberg Y1 - 2012 SP - 64 EP - 70 ER - TY - CHAP A1 - Mottok, Jürgen T1 - Porting the microsoft .net micro framework onto an embedded operating system T2 - 2nd Applied Research Conference 2012 (ARC 2012) 25./26. June 2012, Nuremberg Y1 - 2012 SP - 26 EP - 30 ER - TY - JOUR A1 - Mottok, Jürgen T1 - Embedded functional safety, funktional safety in der praxis JF - Bayern Innovativ Y1 - 2012 ER - TY - CHAP A1 - Mottok, Jürgen T1 - Embedded trends T2 - Technologietag 2012, am 28. März, München Y1 - 2012 ER - TY - CHAP A1 - Landes, Dieter A1 - Sedelmaier, Yvonne A1 - Pfeiffer, Volkhard A1 - Mottok, Jürgen A1 - Hagel, Georg T1 - Learning and teaching software process models T2 - Proceedings of the 2012 IEEE Global Engineering Education Conference (EDUCON), 17-20 April 2012, Marrakech, Morocco N2 - Software process models are fairly abstract tools for organizing large, complex software development projects. Since particularly undergraduate students commonly do not have any experience in being part of such a project, their understanding of the benefits and shortcomings of particular process models is very limited. Even more, frequently they are not aware of the need to follow a particular process model since their previous one-person software assignments were too small for requiring any such model at all. Y1 - 2012 U6 - https://doi.org/10.1109/EDUCON.2012.6201191 ER - TY - CHAP A1 - Abke, Jörg A1 - Brune, Philipp A1 - Haupt, Wolfram A1 - Hagel, Georg A1 - Landes, Dieter A1 - Mottok, Jürgen A1 - Niemetz, Michael A1 - Pfeiffer, Volkhard A1 - Studt, Reimer A1 - Schroll-Decker, Irmgard A1 - Sedelmaier, Yvonne T1 - Evelin – ein Forschungsprojekt zur systematischen Verbesserung des Lernens von Software Engineering T2 - Tagungsband 5th Embedded Software Engineering Kongress, 3. bis 7. Dezember 2012, Sindelfingen Y1 - 2012 SN - 978-3-8343-2407-8 SP - 653 EP - 658 ER - TY - CHAP A1 - Schmidhuber, Stefan A1 - Deubzer, Michael A1 - Mottok, Jürgen ED - Mottok, Jürgen ED - Ziemann, Olaf T1 - Genetic optimization of real-time multicore systems with respect to communication-based metrics T2 - 2nd Applied Research Conference 2012 (ARC 2012) 25./26. June 2012, Nuremberg Y1 - 2012 SN - 978-3-8440-1093-0 SP - 21 EP - 25 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Joseph, Saskia A1 - Schumm, Michael A1 - Schroll-Decker, Irmgard A1 - Niemetz, Michael A1 - Mottok, Jürgen T1 - Anmerkungen zur Kompetenz-Performanz-Relation: Software Engineering im Spannungsfeld der beruflichen Anforderungen T2 - Tagungsband 5th Embedded Software Engineering Kongress, 3. bis 7. Dezember 2012, Sindelfingen Y1 - 2012 ER - TY - BOOK A1 - Gebhard, Vera A1 - Rieger, Gerhard M. A1 - Mottok, Jürgen A1 - Gießelbach, Christian T1 - Funktionale Sicherheit nach ISO 26262 BT - Ein Praxisleitfaden zur Umsetzung KW - Funktionssicherheit KW - ISO/DIS 26262 KW - Kraftfahrzeugbau KW - OEM KW - Produktentwicklung Y1 - 2013 SN - 978-3-89864-788-5 PB - dpunkt.verlag CY - Heidelberg ER - TY - CHAP A1 - Felis, Simeon A1 - Mottok, Jürgen A1 - Bauer, B. A1 - Kohlert, Dieter A1 - Jantz, D. A1 - Laumer, M. T1 - FBI3 – Fehlereinspeisung auf Hardware-Ebene T2 - 3. Landshuter Symposium Mikrosystemtechnik, Tagungsband, 13. und 14. März 2012, Hochschule Landshut Y1 - 2012 SP - 119 EP - 127 ER - TY - CHAP A1 - Alfranseder, Martin A1 - Mottok, Jürgen T1 - Benchmarking parallelisierbarer Algorithmen auf cuda Architekturen T2 - Tagungsband 5th Embedded Software Engineering Kongress, 3. bis 7. Dezember 2012, Sindelfingen Y1 - 2012 PB - Vogel Business Media CY - Würzburg ER - TY - CHAP A1 - Mottok, Jürgen T1 - Dependable multicore scheduling T2 - Continental Software Conference Y1 - 2012 ER - TY - JOUR A1 - Raab, Peter A1 - Krämer, Stefan A1 - Mottok, Jürgen T1 - Reliability of data processing and fault compensation in unreliable arithmetic processors, Microprocessors and Microsystems JF - Microprocessors and Microsystems N2 - In logical circuits, like arithmetic operations in a processor system, arbitrary faults become a more tremendous aspect in future. Modern manufacturing processes lead to less reliability and higher vulnerability of software execution to soft-errors. The correctness of certain results is important especially for safety–critical applications whose reliability depends on the fault-free execution of each single instruction and the dependencies between them. The more complex a software is the more unreliable the outcome is. But, there is a contrary effect. If the probability for multiple faults increases, there is also the chance that two faults compensate each other and the result is correct again. This paper presents the basic ideas for such a reliability evaluation of a software's data flow with arbitrary soft-errors and the effect of fault compensation. Further, this evaluation provides a possibility to compare different implementations of a data flow with respect to the reliability. This is shown by the comparison of two different error codes as alternatives for coded data processing. Y1 - 2016 U6 - https://doi.org/10.1016/j.micpro.2015.07.014 VL - 40 IS - Februar SP - 102 EP - 112 PB - Elsevier ER - TY - CHAP A1 - Soska, Alexander A1 - Schroll-Decker, Irmgard A1 - Mottok, Jürgen T1 - Implementation of Practical Exercises in Software Engineering Education to Improve the Acquirement of Functional and Non-Functional Competences T2 - 2014 International Conference on Interactive Collaborative Learning (ICL), 3-6 Dec. 2014, Dubai, UAE N2 - Software Engineering is a very volatile profession that requires a variety of theoretical as well as practical skills. In addition to expertise technical knowledge, graduates have to have a variety of social, methodical and personal competences. The acquirement of these non-functional competences are getting more and more important for a successful software engineer. To fulfill these requirements, it is necessarily important to prepare future professionals already during their college course of education. This paper presents exercises for a software engineering lecture with the goal to strengthen the students' practical experiences and to support the development of their non-functional competences. The developed exercises impart technical knowledge and encourage the students to improve their self-organized and lifelong learning. Thereby they are facing practical issues in all steps of the software engineering process while working on an inter semester project. KW - software engineering education KW - project-based learning KW - software engineering exercises KW - competences Y1 - 2014 U6 - https://doi.org/10.1109/ICL.2014.7017795 ER - TY - CHAP A1 - Krämer, Stefan A1 - Mottok, Jürgen A1 - Racek, Stanislav T1 - Proportionate fair based multicore scheduling for fault tolerant multicore real-time systems T2 - International Conference on Electrical and Information Technologies (ICEIT), 25-27 March 2015, Marakesch, Morocco N2 - In this paper we present a scheduling approach for safety critical, fault tolerant, multicore real-time embedded systems. For this kind of systems, not only the correctness of a computed result but also the strict adherence to timing requirements of computation is essential to avoid any kind of damage. To react to unpredictable, arbitrary hardware faults suitable error detection mechanisms have to be applied. The caused error itself and the detection and correction have great impact on the system's timing behavior. To still keep the real-time requirements, the used scheduling algorithm has to ensure maximum flexibility to disturbances of the timing. The group of Proportionate Fair (Pfairness) multicore scheduling algorithms has been proven to create an optimal schedule in polynomial time. The contribution of this paper is a Pfair-based algorithm that uses tight coupling between the error detection mechanisms and the scheduler of the real-time operating system to establish a loop-back connection. KW - Multicore processing KW - Time factors KW - Safety KW - Schedules KW - Scheduling algorithms KW - Real-time systems Y1 - 2015 U6 - https://doi.org/10.1109/EITech.2015.7162952 SP - 88 EP - 93 ER - TY - CHAP A1 - Nick, Matthias A1 - Schorer, Michael A1 - Mottok, Jürgen ED - Mottok, Jürgen ED - Ziemann, Olaf T1 - Feasibility Study of a Build System Performing Automated Builds Based on Model-Based Build Descriptions T2 - 2nd Applied Research Conference 2012 (ARC 2012), 25./26. June 2012, Nuremberg Y1 - 2012 SP - 71 EP - 75 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Steindl, Michael A1 - Mottok, Jürgen T1 - Deriving an integration order in a component-based embedded system using simulated annealing T2 - Proceedings of the 13. Mitteldeutschen Nachwuchswissenschaftlerkonferenz (NWK13), April 2012, Goerlitz, Germany Y1 - 2012 SN - 978-3-86870-436-5 ER - TY - CHAP A1 - Steindl, Michael A1 - Mottok, Jürgen T1 - Considering Schedule Requirements of Software Integration in Component based Embedded System T2 - International Conference on Applied Electronics, 2012, Pilsen, Czech Republic Y1 - 2012 ER - TY - CHAP A1 - Mottok, Jürgen T1 - Verbundprojekt EVELIN T2 - HDS.Forum Lernkulturen Y1 - 2012 ER - TY - CHAP A1 - Mottok, Jürgen T1 - Entdeckendes Lernen T2 - HDS.Forum Lernkulturen Y1 - 2012 ER - TY - CHAP A1 - Knorl, Susanne A1 - Soska, Alexander A1 - Schroll-Decker, Irmgard A1 - Mottok, Jürgen T1 - Reconstructing students’ subjective theories on self-directed learning a qualitative research approach in Software Engineering education T2 - 2015 IEEE Global Engineering Education Conference (EDUCON), 18-20 March 2015, Tallinn, Estonia N2 - Considering the claim of furthering self-directed learning in higher education in general and in Software Engineering education in particular, this paper deals with a new approach on understanding and facilitating self-directed learning. This approach involves the concept of subjective theories, which are expected to influence students' self-directed learning. Therefore this paper presents the intended qualitative research design for reconstructing these subjective theories and for developing ways of integrating them in didactical situations in higher education and especially in Software Engineering education. Y1 - 2015 U6 - https://doi.org/10.1109/EDUCON.2015.7095990 SP - 314 EP - 317 ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen A1 - Wolff, Christian T1 - Playful learning in academic software engineering education T2 - 2015 IEEE Global Engineering Education Conference (EDUCON), 18-20 March 2015, Tallinn, Estonia N2 - Within this thesis, we present our suggestions why playful learning in software engineering education is useful to mediate generic competences in academic teaching. Therefor we identified competences which are addressed by playful learning and mapped them to demanded generic competences in software engineering. Due to the well compliance, we analyzed current implementations of playful learning and their design regarding the mediation of required soft skills. Based on the lack of effective implementation, we close our paper with an exemplary design for playful learning. Y1 - 2015 U6 - https://doi.org/10.1109/EDUCON.2015.7095992 SP - 324 EP - 332 ER - TY - CHAP A1 - Studt, Reimer A1 - Winterfeldt, Götz A1 - Mottok, Jürgen T1 - Measuring software engineering competencies T2 - 2015 IEEE Global Engineering Education Conference (EDUCON), 18-20 March 2015, Tallinn, Estonia N2 - Measuring competencies may serve as a feedback mechanism as well as a judgment device for a lecturer. As measuring every competency from a catalogue of competencies is not very viable, the to-be-measured competencies are grouped in competency profiles. Further, assessment practices are shown and applied to a course in a study program. A discussion of useful practices concludes this contribution. Y1 - 2015 U6 - https://doi.org/10.1109/EDUCON.2015.7096081 ER - TY - CHAP A1 - Beslmeisl, Magdalena A1 - Krekeler, T. A1 - Schroll-Decker, Irmgard A1 - Mottok, Jürgen T1 - Der begleitende Einsatz des Online Lerntagebuchs (OLTB) im Software Engineering; als Instrument zur individuellen Lernstandortbestimmung T2 - 2. HD MINT Symposium, 2015, Nürnberg Y1 - 2015 SP - 148 EP - 154 ER - TY - CHAP A1 - Ye Tao, A1 - Guozhu Liu, A1 - Mottok, Jürgen A1 - Hackenberg, Rudolf A1 - Hagel, Georg T1 - Just-in-Time-Teaching experience in a Software Design Pattern course T2 - 2015 IEEE Global Engineering Education Conference (EDUCON), 18-20 March 2015, Tallinn, Estonia Y1 - 2015 SP - 915 EP - 919 ER - TY - CHAP A1 - Martin, Felix A1 - Sailer, Andreas A1 - Deubzer, Michael A1 - Mottok, Jürgen T1 - Automatische Multicore-Echtzeitvalidierung – Ein Prozess für modellbasierte Softwareentwicklung T2 - Tagungsband 8th Embedded Software Engineering Kongress (ESE), 30.11. - 04.12.2015, Sindelfingen Y1 - 2015 ER - TY - CHAP A1 - Beslmeisl, Magdalena A1 - Schroll-Decker, Irmgard A1 - Mottok, Jürgen T1 - Turning to adaption through exploration in the education of Software Engineering T2 - Proceedings of the Exploring Teaching for Active Learning in Engineering Education (ETALEE), 11 - 12 November 2015, Copenhagen Y1 - 2015 ER - TY - CHAP A1 - Martin, Felix A1 - Sailer, Andreas A1 - Deubzer, Michael A1 - Mottok, Jürgen T1 - Automation of a Closed Loop Model-Based Development Process T2 - Applied Research Conference 2015 (ARC 2015), 3rd July 2015, Nürnberg Y1 - 2015 ER - TY - CHAP A1 - Beslmeisl, Magdalena A1 - Schroll-Decker, Irmgard A1 - Mottok, Jürgen T1 - Application of a Reflective Learning Approach in Software Engineering. Circularity as a relevant characteristic of a reflective teaching and learning approach T2 - European Conference of Software Engineering Education (ECSEE2016), 30 June and 1 July 2016 in Seeon Monastery, Germany N2 - The pedagogic motivation of this contribution is to develop, to adapt and to examine a specific tertiary teaching-learning situation and its changes due to a constant reflection. Within the scope of the BMBF fostered project " EVELIN " the learning teaching-Arrangement (TLA) " The Online Learning Journal (OLJ) – a tool complementing the software engineering lecture " is realized a second time at the OTH Regensburg. This further development is examined from a pedagogic perspective. This paper deals with issues concerning the conscious modification of specific teaching actions, therefore the changes of the teachers' attitude as well as the reaction of the students regarding this teaching actions. Two important findings are: (1) The teaching staff is able to adapt their teaching–actions on given conditions because of the awareness of their own teaching-attitude. (2) Due to a reflective teaching practice, there is a great potential for goal oriented learning in the context of higher education. Y1 - 2016 SP - 19 EP - 33 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen A1 - Wolff, Christian T1 - An experimental card game for software testing: Development, design and evaluation of a physical card game to deepen the knowledge of students in academic software testing education T2 - IEEE Global Engineering Education Conference (EDUCON), 10-13 April 2016, Abu Dhabi, UAE N2 - Teaching software testing is a challenging task. Especially if you want to impart more in-depth and practical knowledge to the students. Therefore, most lectures still teach in a classic lecture format despite the fact that this way of instruction is in any case the optimal way of instruction for today's requirements anymore. In this paper we present our implementation of an active learning method to deepen the knowledge in academic software test education. We describe a card game for advanced learning that promotes students' collaboration and knowledge exchange in a playful and competitive manner. The design of the game is based on constructive and cooperative theories. A subsequent evaluation shows that the use of this card game for teaching software testing is a suitable method. KW - software testing KW - playful learning KW - game-based learning KW - card game Y1 - 2016 U6 - https://doi.org/10.1109/EDUCON.2016.7474609 SP - 576 EP - 584 ER - TY - CHAP A1 - Nivala, Markus A1 - Hauser, Florian A1 - Mottok, Jürgen A1 - Gruber, Hans T1 - Developing visual expertise in software engineering: An eye tracking study T2 - IEEE Global Engineering Education Conference (EDUCON), 10-13 April 2016, Abu Dhabi, UAE N2 - Program comprehension and the ability to find program errors are key skills of software engineering. The aim of this pilot study was to examine the visual processes of novice and advanced programmers in authentic tasks. Fifteen novices and eight advanced programmers were given eight short pieces of code. Their task was to either identify an error or give the output of the code. Eye movements and keyboard activity were recorded. On average, the novices spent more time reading the code than composing the response, whereas the more advanced programmers started composing the response sooner and spent more time on it. In general, the advanced programmers had shorter fixations and saccades. The results suggest that the advanced programmers are quicker to grasp the essence of the code and able to see more details in it. The advanced programmers had shorter fixations and saccade lengths during the second phase which might indicate the process of chunking. KW - program comprehension KW - debugging KW - software engineering KW - visual expertise KW - eye tracking Y1 - 2016 U6 - https://doi.org/10.1109/EDUCON.2016.7474614 SP - 613 EP - 620 ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen A1 - Wolff, Christian T1 - A Study on Cognitive Decits in Learning to Program T2 - European Conference of Software Engineering Education (ECSEE2016), 30 June and 1 July 2016 in Seeon Monastery, Germany N2 - For many students learning to program is a crucial task. In this research, we took a glance into the current literature and identified most ocurring cognitive deficits. Thereby we identified three elements that apear most significant throughout the study. We think that these deficits are fundamental basics for learning how to program. The stu-dents' education of cognitive abilities in programming needs revision and should receive far more training. In future research we want to establish a guideline for promoting these deficits through adequate teaching and learning arrangements in pre-programming education. Y1 - 2016 UR - https://www.researchgate.net/publication/304988534_A_Study_on_Cognitive_Deficits_in_Learning_to_Program SP - 209 EP - 214 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Beslmeisl, Magdalena A1 - Reuter, Rebecca A1 - Mottok, Jürgen ED - Auer, M. ED - Guralnick, D. ED - Uhomoibhi, J. T1 - Importance of Writing in Software Engineering Education T2 - Interactive Collaborative Learning, ICL 2016, proceedings of the 19th ICL Conference, Volume 1 N2 - In this paper we present our first steps in defining the type, scope and relevance of writing in higher education of software engineering. We aim to identify lacks of scientific research and raise a new and necessary research interest to push research in this area. First we clarify the relevance of writing in higher education in general. In a second step we highlight the relevance of writing in the domain of software engineering in particular. Soft skills to be taught to students of engineering professions and especially to software engineering students are highly discussed. We discuss the skill of writing from a theoretical view as well as reasons for the high relevance of this skill for future engineers. An obligation of teaching writing in the higher education is formulated. Y1 - 2016 U6 - https://doi.org/10.1007/978-3-319-50337-0_29 SP - 315 EP - 321 ER - TY - CHAP A1 - Sailer, Andreas A1 - Deubzer, Michael A1 - Lüttgen, Gerald A1 - Mottok, Jürgen T1 - Comparing Trace Recordings of Automotive Realtime Software T2 - RTNS '17: Proceedings of the 25th International Conference on Real-Time Networks and Systems, Grenoble, France, IEEE N2 - The process of engineering models of existing real-time system components is often difficult and time consuming, especially when legacy code has to be re-used or information about the exact timing behaviour is needed. In order to tackle this reverse engineering problem, we have developed the tool CoreTAna. CoreTAna derives an AUTOSAR compliant model of a real-time system by conducting dynamic analysis using trace recordings. Motivated by the challenge of assessing the quality of reverse engineered models of real-time software, we present a novel mathematical measure for comparing trace recordings from embedded real-time systems regarding their temporal behaviour. We also introduce a benchmark framework based on this measure, for evaluating reverse engineering tools such as CoreTAna. This considers common system architectures and also includes randomly generated systems and three systems of industrial automotive projects. Finally, an industrial case study demonstrates other use cases of our measure, such as impact analysis. Y1 - 2017 U6 - https://doi.org/10.1145/3139258.3139265 SP - 118 EP - 127 ER - TY - CHAP A1 - Sailer, Andreas A1 - Deubzer, Michael A1 - Lüttgen, Gerald A1 - Mottok, Jürgen T1 - CoreTAna: A Trace Analyzer for Reverse Engineering Real-Time Software T2 - IEEE 23rd International Conference on Software Analysis, Evolution, and Reengineering (SANER), March 14 to March 18 2016, Suita, Osaka, Japan N2 - With the availability of the AUTOSAR standard, model-driven methodologies are becoming established in theautomotive domain. However, the process of creating models ofexisting system components is often difficult and time consuming, especially when legacy code has to be re-used or informationabout the exact timing behavior is needed. In order to tackle thisreverse engineering problem, we present CoreTAna, a novel toolthat derives an AUTOSAR compliant model of a real-time systemfrom a dynamic analysis of its trace recordings. This paper givesan overview of CoreTAna's current features and discusses itsbenefits for reverse engineering. KW - AUTOSAR KW - tracing KW - profiling KW - timing model KW - reverse engineering Y1 - 2016 U6 - https://doi.org/10.1109/SANER.2016.36 ER - TY - CHAP A1 - Haas, Kerstin A1 - Mottok, Jürgen T1 - Research oriented learning in a research association - Evaluated in a maturity model T2 - Teaching and Learning in a Digital World, Proceedings of the 20th International Conference on Interactive Collaborative Learning (ICL), September 27 to 29, 2017, in Budapest, Hungary - Volume 1 N2 - Research-oriented learning provides students the opportunity to develop their research competences by experiencing research practice, this often happens in the surrounding of research associations with different universities and companies. This paper introduces a two-step approach to evaluate the research-oriented learning within a research association. First we conduct the evaluation of the research environment with the instrument of the adapted Collaboration Maturity Model (Col-MM) to see whether the collaboration network and the management is able to support the students in their learning process. Additionally, we take into account the evaluation of the students’ research competence. This approach targets the assessment of the starting conditions of the students and to compare their performance level until the end of the research association project phase. These two evaluation phases provide the potential to create an ideal research environment and consequently enable the students to develop and improve their research competence. Y1 - 2017 U6 - https://doi.org/10.1007/978-3-319-73210-7_81 SP - 695 EP - 701 ER - TY - CHAP A1 - Waegemann, Tobias A1 - Langer, Tobias A1 - Mottok, Jürgen A1 - Osinski, Lukas A1 - Stappert, Friedhelm A1 - Tayakoli Kolagari, Ramin T1 - Models for Dependable Heterogenous Multi- and Many-Core System Software Design Revisited T2 - ARCS 2016, 29th International Conference on Architecture of Computing Systems, 4-7 April 2016, Nuremberg, Germany N2 - Modelling approaches have to satisfy certain criteria in order to sufficiently encompass the characteristics of dependable heterogenous multi- and many-core system architectures. This work-in-progress paper gives an overview of modern modelling approaches and their related research projects, particularly those regarding domain specific architecture description languages, as well as of the specific challenges of dependable systems and heterogenous multi- and many-core designs, i.e. scheduling techniques for real-time requirements and concerns regarding functional safety. Furthermore, an ongoing research effort in order to identify a set of criteria for evaluating the eligibility of modelling approaches for the task of adequately representing these systems and their specific characteristics is presented. Y1 - 2016 ER - TY - CHAP A1 - Mottok, Jürgen A1 - Merk, Josef A1 - Falter, Thomas T1 - A multi dimensional view of the Graves value systems model on teaching and learning leading to a students-centered learning: Graves model revisited T2 - IEEE Global Engineering Education Conference (EDUCON), 10-13 April 2016, Abu Dhabi, UAE N2 - A cultural change at the university eco-system is possible with diverse learning approaches in faculties. Diverse learning offers will cope with the diversity of students regarding their value systems. Currently teaching at universities is dominated by "teacher-centered teaching", also there are approaches to use different methods to accelerate and intensify the teaching and learning process. Nevertheless these approaches do often not show the desired impact with all students. This paper is offering insights how that comes using the Graves value systems model and is proposing a set of methods which fits to different value systems of students. KW - Graves Value Systems Model KW - Teaching methods KW - Students-centered teaching KW - Inside-outside classroom learning , KW - Scaffolding KW - Cultural set up Y1 - 2016 U6 - https://doi.org/10.1109/EDUCON.2016.7474600 SP - 503 EP - 512 ER - TY - CHAP A1 - Tao, Ye A1 - Liu, Guozhu A1 - Mottok, Jürgen A1 - Hackenberg, Rudolf A1 - Hagel, Georg T1 - Ranking task activity in teaching software engineering T2 - IEEE Global Engineering Education Conference (EDUCON), 10-13 April 2016, Abu Dhabi, UAE N2 - In this research, we investigate the possibility of applying ranking task activity in teaching and learning software engineering courses. We introduce three types of ranking tasks, conceptual-, contextual- and sequential ranking questions, which cover most core topics such as requirement analysis, architecture design and quality validation in the course. We have also done experiments on a group of students to see if ranking tasks could increase their conceptual knowledge in specific areas. Assessments were given in order to evaluate the effectiveness of this activity, showing an obvious increase in complex conceptual understanding. Y1 - 2016 U6 - https://doi.org/10.1109/EDUCON.2016.7474678 SP - 1023 EP - 1027 ER - TY - CHAP A1 - Hauser, Florian A1 - Reiß, Markus A1 - Nivala, Markus A1 - Mottok, Jürgen A1 - Gruber, Hans T1 - Eye tracking applied: Visual expertise in code reviews T2 - 9th International Conference on Education and New Learning Technologies, EDULEARN17, 3-5 July, 2017, Barcelona, Spain, Proceedings Y1 - 2017 U6 - https://doi.org/10.21125/edulearn.2017.1084 SP - 379 EP - 389 ER - TY - CHAP A1 - Haas, Kerstin A1 - Mottok, Jürgen T1 - Evaluation of the Research-oriented Learning Environment in a Research Association T2 - 9th International Conference on Education and New Learning Technologies, EDULEARN2017, 3-5 July 2017, Barcelona, Spain, Proceedings Y1 - 2017 U6 - https://doi.org/10.21125/edulearn.2017.0872 ER - TY - CHAP A1 - Soska, Alexander A1 - Reuter, Rebecca A1 - Hauser, Florian A1 - Reiß, Markus A1 - Mottok, Jürgen T1 - Scaffolding in der Lehre von Design Pattern. Neue Konzepte für anwendungsorientiertes und aktivierendes Lernen T2 - Tagungsband zum 3. Symposium zur Hochschullehre in den MINT-Fächern, 25. / 26. September 2017, TH Nürnberg N2 - Design Pattern sind wiederverwendbare Entwurfsmuster für Probleme in objektorientierten Programmiersprachen. Gene-rell wird dieser Lerninhalt als sehr abstrakt, theoretisch und schwer verständlich beurteilt. Eine durchgeführte Studie mit Studierenden zu den Lernhindernissen während unseres Soft-ware Engineering Curriculums belegen diese Annahmen. Trotz heterogener Studierendengruppe mit unterschiedlichen Vor-kenntnissen, wird das Verständnis der Konzepte von Design Pattern, verglichen mit anderen Lehrinhalten, als die größte Herausforderung angesehen. Zur Verbesserung des Lernens von Design Pattern, wurde aufgrund dieser Erkenntnisse ein Lehrkonzept zur Beseitigung der Lernhindernisse entwickelt. Dieses basiert auf einem angepassten Scaffolding-Ansatz, welcher u.a. durch die systematische Anwendung von studie-rendenzentrierten Methoden die Aneignung von theoretischen als auch praktischen Inhalten sukzessive fördert. Eine anschlie-ßende Evaluation belegt die Wirkungsweise des Lehrkonzepts. Y1 - 2017 UR - https://www.th-nuernberg.de/fileadmin/abteilungen/sll/Dokumente/Hochschuldidaktik/MINT_Symposium/Tagungsband_MINT_Symposium_2017.pdf SP - 112 EP - 116 ER - TY - CHAP A1 - Langer, Tobias A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - A Survey of Parallel Hard-Real Time Scheduling on Task Models and Scheduling Approaches T2 - ARCS 2017; 30th International Conference on Architecture of Computing Systems, 3-6 April 2017, Vienna, Austria N2 - The trend towards multi-core systems becomes increasinglyomnipresentandhasalreadyreachedhardreal-time systems. In the recent years more and more researchers tackle the problem of scheduling parallel tasks with real-time constraints. We present a discussion of these recent approaches to hard real-time scheduling tasks consisting of multiple threads. We identify categories in scheduling mechanisms and task systems and discuss their features, as well as the research already achieved in their ???elds. In the domain of task models we identi???ed the gang constrained task model, the order constrained task model and the unconstrained task model. These task models differ regardingtheamountandtypeofthreadexecutionconstraints, which can be expressed using the model. Regarding scheduling algorithms, we identi???ed transformation based and nontransformation based scheduling schemes. The former rely on off-line task transformation, whereas the latter doesn???t require any prior information about task structures. The presented classi???cations show, that applied scheduling algorithms mostly are not restricted to certain task models, but that they are applied quite independently. Y1 - 2017 UR - https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7948560 ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen A1 - Wolff, Christian T1 - Pattern oriented card game development: SOFTTY - A card game for academic learning of software testing T2 - IEEE Global Engineering Education Conference (EDUCON), 25-28 April 2017, Athens, Greece N2 - One of the biggest problems of educational games is the adequate integration of learning content into the game environment. Thereby the main challenge is to create a balance between gameplay and learning objectives and the correct transfer of learning principles into the game design. A useful approach is to identify game components and their specific learning constraints and the relationship between each other. By mapping learning elements to Game Design Pattern, we elaborate fundamentals for the concrete game design, focusing on card games. A shared description and an understanding of how the game design aligns with learning content facilitates the development of high quality educational games. A short illustration of our further developed implementation summarizes our experiences and shows an exemplary realization. Y1 - 2017 U6 - https://doi.org/10.1109/EDUCON.2017.7942996 ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Mottok, Jürgen T1 - A Survey of Fault Tolerance Approaches at Different Architecture Levels T2 - 30th International Conference on Architecture of Computing Systems, ARCS 2017, 3-6 April 2017, Vienna, Austria N2 - In the recent years the development trends for computing platforms moved to multicore systems. Associated with this trend, feature sizes decreased with each new hardware generation and consequently led to a rise of transient and permanent error frequency in memory and CPUs. In this context, researchers presented several approaches which exploit the inherent redundancy of multicore platforms to provide fault tolerance. We present a discussion of fault tolerance approaches based on redundancy at different levels of architecture regarding theirsphereofreplication,performanceaswellaserrordetection and recovery capability. Y1 - 2017 UR - https://ieeexplore.ieee.org/document/7948561 SP - 1 EP - 9 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Beslmeisl, Magdalena A1 - Mottok, Jürgen T1 - Work in Progress: Teaching-Obstacles in Higher Software Engineering Education T2 - 8th IEEE Global Engineering Education Conference (EDUCON 2017), Athens, Greece N2 - Software Engineering is very abstract and complex by nature. Teaching Software Engineering in higher education is therefore still a big challenge. Although we implemented inductive teaching and learning methods in our courses for several years, we do not have a panacea. This paper aims to identify the remaining teaching obstacles in our Software Engineering courses with regard to the concrete teaching content. We present first ideas on how to overcome these teaching obstacles by the application of Augmented and/or Virtual Reality techniques with regard to the identified obstacles. Y1 - 2017 U6 - https://doi.org/10.1109/EDUCON.2017.7943067 SP - 1631 EP - 1635 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Hauser, Florian A1 - Gold-Veerkamp, Carolin A1 - Mottok, Jürgen A1 - Abke, Jörg T1 - Towards a Definition and Identification of Learning Obstacles in Higher Software Engineering Education T2 - EDULEARN17 Proceedings, 9th International Conference on Education and New Learning Technologies, 3-5 July, 2017, Barcelona, Spain KW - Hochschuldidaktik KW - Software Engineering Y1 - 2017 SN - 978-84-697-3777-4 U6 - https://doi.org/10.21125/edulearn.2017.0943 SN - 2340-1117 SP - 10259 EP - 10267 ER - TY - CHAP A1 - Nivala, Markus A1 - Hauser, Florian A1 - Jossberger, Helen A1 - Reiß, Markus A1 - Mottok, Jürgen A1 - Gruber, Hans T1 - Detecting errors in program flow diagrams: Comparing novices and advanced programmers T2 - EARLI Biennial Conference 2017, 17th European Association for Research on Learning and Instruction, 29 August - 2 September, 2017 - University of Tampere, Finland Y1 - 2017 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Kuhn, Martina A1 - Mottok, Jürgen T1 - A Two-Sided Approach of Applying Software Engineering Perspectives in Higher Education T2 - Teaching and Learning in a Digital World, ICL 2017, Proceedings of the 20th International Conference on Interactive Collaborative Learning - Volume 1 Y1 - 2017 SP - 460 EP - 467 ER - TY - RPRT A1 - Soska, Alexander A1 - Mottok, Jürgen ED - Baier, Wolfgang T1 - An Experimental Card Game for Software Testing T2 - Forschungsbericht 2017 der Ostbayersichen Technischen Hochschule Regensburg Y1 - 2017 UR - https://doi.org/10.35096/othr/pub-1383 CY - Regensburg ER - TY - CHAP A1 - Kampmann, Matthias A1 - Mottok, Jürgen T1 - A ‘laboratory’ as an approach to foster writing skills at software engineering studies learning software engineering is easier when writing courses are directly dpplied to lecture’s content and the problems and examples enrolled in T2 - 2018 IEEE Global Engineering Education Conference, EDUCON 2018, Santa Cruz de Teneriffe, Spanien N2 - Writing, with no doubt, is besides reading a core competency which allows us to "exploit" knowledge in general. It also makes possible the exploration of software engineering's core issues. Especially within this context it is necessary to master the reading of complex texts as well as to be able to write in an appropriate academic expression. With regard to studies in software engineering this seems to be obvious, but in fact the opposite is the reality. Therefore measures to improve these skills seemed to be necessarily applied. At the Ostbayerische Technische Hochschule (OTH, University of Applied Sciences, Regensburg) a new format, the so called c*lab, was installed during the winter semester 2017. This was a course which followed the principle of "Writing Across the Curriculum" (WAC). Organized parallel to a lecture of learning how to program the language C, and addressing students of the first semester, the course was a complete voluntary offer in addition to the general standard courses and lectures of the faculty. Students who participated not only reflected on C and its principles, nor only on writing as a self purpose, but they also learned to express technical thoughts and ideas by the use of didactic methods. The idea to transfer also basic LTeX concepts to write a paper based on the IEEE bare_conf.tex-template were also planned. The course followed the idea of student's-centred learning. This paper presents the main structure, goals, and means of the c*lab, and the theory behind. It also embeds the course within the horizon of experiences of teaching writing skills at the Laboratory for Safe and Secure Systems (LaS 3 ) at the faculty of electronic and information engineering at the OTH Regensburg. First experiences have shown that participants increase writing skills and their idea of the importance of writing. Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363326 SP - 900 EP - 908 ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Control Flow Errors: A Discussion of Different Injection Strategies T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - Among the available dependability assessment techniques, fault injection (FI) is widely adopted and strongly recommended by safety standards for the validation that functional and technical safety mechanisms are implemented correctly and effectively. The main challenge in fault injection assessments is the increasing complexity of system-on-chips as well as the increasing size of memory, which leads to enormous efforts to test every possible fault introduced to the system. Therefore, a number of publicly available fault injection frameworks utilize fault space pruning techniques to reduce the overall fault space and consequently the overall experiment duration. Most of the fault space pruning techniques mainly discuss the reduction of the number of data errors which have to be injected into registers and memory locations. However, control flow errors represent a further domain of possible errors on the application level. Usually for the evaluation of effectiveness of fault tolerance mechanisms against data errors, a single fault assumption at microarchitectural level (e.g. bit-flips) is assumed. In most cases, this assumption is equivalently applied to the program counter to investigate possible control flow errors. Due to this approach, the error space is consciously or unconsciously reduced to the possible erroneous jump targets that can be reached by a specific set of bit-flips in the program counter at a specified time during the program execution. This approach is considered valid regarding the corresponding fault assumption, but leads to negative effects on the significance of the injection and the resulting effectiveness of the tested fault tolerance mechanism. In this paper, we discuss different strategies for the analysis and injection of control flow errors and the resulting differences by considering the single fault assumption at microarchitectural and application level. Y1 - 2019 UR - http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8836207&isnumber=8836190 SP - 1 EP - 7 ER - TY - CHAP A1 - Lalo, Erjola A1 - Weber, Raphael A1 - Sailer, Andreas A1 - Mottok, Jürgen A1 - Siemers, Christian T1 - On Solving Task Allocation and Schedule Generation for Time-Triggered LET Systems using Constraint Programming T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - The amount of safety-critical embedded systems in automotive development is heavily growing. Ensuring their reliability not only increases the complexity of functions but also requires determinism at design and execution time, which is considerably challenging to fulfill and verify for multi-core processors. The Logical Execution Time (LET) is recently recognized in automotive industry as an approach for ensuring deterministic functional behavior. However, to decrease the manual design effort and time for deploying such complex systems to multi-core platforms and for ensuring their strict timing and safety requirements, automatic solutions are needed. This work presents a solution for allocating tasks to multi-core processors and generating a time-triggered schedule for embedded systems considering safety, timing, and LET semantics. The approach we propose solves both challenges by defining them as a Constraint Satisfaction Problem (CSP). To examine our CSP formulation, we use MiniZinc, which is a solver-independent constraint modeling language that can employ a variety of solvers. In a case study, we explore optimizations of an industrial system that are enabled by scheduling and task allocation design decisions. Further, the performance of the proposed solutions is evaluated based on large set of synthetically generated system models. Y1 - 2019 UR - https://ieeexplore.ieee.org/abstract/document/8836201 SP - 1 EP - 8 ER - TY - CHAP A1 - Schmid, Michael A1 - Langer, Tobias A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Parallel Active Object Pattern T2 - 31th International Conference on Architecture of Computing Systems, ARCS Workshop 2018,9-12 April 2018, Braunschweig, Germany N2 - With parallel applications becoming more and more popular even in real-time systems, the demand for safe and easyto- use software libraries and frameworks for parallel and concurrent computations is growing immensely. These frameworks usually provide an implementation for different sets of software patterns. A very well known software pattern for concurrency is the Active Object pattern, that allows various threads to have synchronized access to an object in question. This paper presents the Parallel Active Object pattern, which extends the common Active Object pattern to support the use of objects, whose computations are profoundly enhanced by a parallel execution. Furthermore, a C++ software framework is introduced, which implements the Parallel Active Object pattern and thus provides the possibility of using task or data parallel patterns, for example Map, Reduce and Divide-and-Conquer, on the active object's calculations. The proposed framework is evaluated against two other popular libraries, namely OpenMP and Intel Threading Building Blocks. Through utilization of the C++11 standard and template classes a simple user interface is provided, which abstracts the distribution of workloads among the worker threads. By making use of the C++ Standard Template Library the framework can easily be ported to embedded systems and by extending the pattern through real-time capabilities, which ensure a timely and reliable execution of the method requests, the intention of providing the framework for time critical environments is also targeted in the future. Y1 - 2018 UR - https://ieeexplore.ieee.org/document/8385426 SN - 978-3-8007-4559-3 ER - TY - CHAP A1 - Nagengast, Christian A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Synchronization Techniques for Parallel Redundant Execution of Applications T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - In fault tolerant systems, applications are replicated and executed to enable error detection and recovery. If one replica application fails, another is able to take its place and provide the correct results. This concept can benefit from parallel execution on separate execution units. The rise of multicore platforms supports the development of parallel software, by providing the adequate hardware. However, this raises challenges regarding the synchronization of the redundant strings of execution. Replica determinism means that given the same input, identical programs provide the same output. To ensure replica determinism, requirements regarding the synchronization can be split in two domains: data and time. This paper examines the state of the art of synchronization techniques for parallel replicated execution in the context of fault tolerant systems. We analyze the requirements regarding synchronization within the time and data domain and compare different concepts of hardware (multicore, multiprocessor and multi-PCB) and software (processes, threads). Y1 - 2019 UR - http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8836209&isnumber=8836190 SP - 1 EP - 8 PB - IEEE ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - A Multicore Fault Tolerance Approach Based on Coded Processing T2 - Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France N2 - Development trends for computing platforms moved from increasing the frequency of a single processor to increasing the parallelism with multiple cores on the same die. Multiple cores have strong potential to support cost-efficient fault tolerance due to their inherent spatial redundancy. This work makes a step towards software-only fault tolerance in the presence of permanent and transient hardware faults. Our approach utilizes software-based spatial triple modular redundancy and coded processing on a shared memory multi-core controller. We evaluate our approach on an Infineon AURIX TriBoard TC277 and provide experimental evidence for error resistance by fault injection campaigns with an iSystem iC5000 On-chip Analyzer. Y1 - 2018 UR - https://hal.archives-ouvertes.fr/hal-02156233 ER - TY - CHAP A1 - Mottok, Jürgen A1 - Reichenberger, Marcus T1 - Use of Static Analysis and Coding Guidelines in embedded Systems Software T2 - 1st Applied Research Conference, ARC 2019, 8 July 2019, Regensburg Y1 - 2019 SN - 978-3-96409-182-6 SP - 571 EP - 578 PB - Pro BUSINESS ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Das FORMUS³IC Forschungsvorhaben im Verbund – Vom Stand der Technik zu neuen Entwicklungen T2 - Embedded Software Engineering Kongress (ESE 2018), 3.-7.12.2018, Sindelfingen, Tagungsband Y1 - 2018 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Hauser, Florian A1 - Gold-Veerkamp, Carolin A1 - Stark, Theresa A1 - Kis, Juliane A1 - Mottok, Jürgen A1 - Abke, Jörg A1 - Meyer, Dany T1 - Towards the construction of a questionnaire for the identification of learning obstacles T2 - 2018 IEEE Global Engineering Education Conference (EDUCON 2018), 17-20 April, 2018, Santa Cruz de Tenerife, Spain N2 - This paper deals with the identification of learning ob-stacles using the questionnaire method. Therefore, two iterations were proceeded: The first one was part of a survey that was carried out at four lo-cations at universities of applied sciences. We asked students about obstructive facts in general providing items for five learning ob-stacle dimensions that were set up before; emotional/motivational, epistemological/cognitive, didactical, resource-related and meta-cognitive learning obstacle dimensions. After the general part, we asked them to answer the same question, but in relation to the – in their opinion – most difficult learning content. With this question, we aim to get indications regarding to epistemological obstacles. In a second step, we used the “Motivated Strategies for Learning Questionnaire”, which was developed by Pintrich [1] as a basis to develop a questionnaire that extracts learning obstacles. In its original version, the “Motivated Strategies for Learning Question-naire” was intended to measure students’ learning strategies, but, as the obstacle dimensions were partly derived from learning strategy classification, we chose this already validated question-naire [2]. Within this iteration, we could confirm a five-factor structure of the questionnaire that could be mapped to the five be-fore set learning obstacle dimensions. Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363266 SP - 457 EP - 466 ER - TY - CHAP A1 - Hauser, Florian A1 - Reuter, Rebecca A1 - Gruber, Hans A1 - Mottok, Jürgen T1 - Research competence: Modification of a questionnaire to measure research competence at universities of applied sciences T2 - IEEE Global Engineering Education Conference (EDUCON), 17-20 April 2018, Santa Cruz de Tenerife, Spain N2 - This paper deals with the validation and modification of the German questionnaire "F-Komp". In its original version, it was intended to measure university students' research competences. In the beginning of this study, there were only a few tools available which were reliable. For the purposes of this study, they were not suitable. At the same time, there was no validated version of the F-Komp available, which made the whole validation process for further usage necessary. This questionnaire is based on a structure, which consist of different skills and knowledge and is focused on measuring research competence in general. The validation and modification of the F-Komp is therefore the aim of our contribution as well as a revised version of the questionnaire. We proceeded an explorative factor and a reliability analysis to do a general evaluation of the tool. Some modifications were done in the questionnaire to make it more suitable to the requirements of technical oriented universities of applied sciences [5]. Our revised version is slightly longer and contains several items to gather data about the participants demographics. The modified questionnaire is based on a more appropriate factor structure. This structure is more practically oriented and pays attention to ethical issues. In future cases, this questionnaire will be used in research oriented courses to measure students' progress in acquiring the knowledge and methods which are necessary to perform as a scientist in different research areas. KW - research oriented teaching KW - research competence KW - competence model KW - modification of a questionnaire Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363216 SP - 109 EP - 117 ER - TY - CHAP A1 - Schmid, Michael A1 - Mottok, Jürgen ED - Schoeberl, Martin ED - Hochberger, Christian ED - Uhrig, Sascha ED - Brehm, Jürgen ED - Pionteck, Thilo T1 - Asynchronous Critical Sections in Real-Time Multiprocessor Systems T2 - Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings N2 - Sharing data across multiple tasks in multiprocessor systems has intensively been studied in the past decades. Various synchronization protocols, the most well-known being the Priority Inheritance Protocol or the Priority Ceiling Protocol, have been established and analyzed so that blocking times of tasks waiting to access a shared resource can be upper bounded. To the best of our knowledge, all of these protocols share one commonality: Tasks that want to enter a critical section, that is already being executed by another task, immediately get blocked. In this paper, we introduce the Asynchronous Priority Ceiling Protocol (A-PCP), which makes use of aperiodic servers to execute the critical sections asynchronously, while the calling task can continue its work on non-critical section code. For this protocol, we provide a worst-case response time analysis of the asynchronous computations, as well as necessary and sufficient conditions for a feasibility analysis of a set of periodic tasks using the proposed synchronization model on a system that preemptively schedules the tasks under the rate-monotonic priority assignment. Y1 - 2019 U6 - https://doi.org/10.1007/978-3-030-18656-2_5 SP - 56 EP - 67 PB - Springer CY - Cham ER - TY - BOOK A1 - Weilkiens, Tim A1 - Huwaldt, Alexander A1 - Mottok, Jürgen A1 - Roth, Stephan A1 - Willert, Andreas T1 - Modellbasierte Softwareentwicklung für eingebettete Systeme verstehen und anwenden N2 - Die Beherrschung von Komplexität ist eine der größten Engineering-Herausforderungen des 21. Jahrhunderts. Themen wie das „Internet der Dinge“ (IoT) und „Industrie 4.0“ beschleunigen diesen Trend. Die modellgetriebene Entwicklung leistet einen entscheidenden Beitrag, um diesen Herausforderungen erfolgreich begegnen zu können. Die Autoren geben einen fundierten Einstieg und praxisorientierten Überblick über die Modellierung von Software für eingebettete Systeme von den Anforderungen über die Architektur bis zum Design, der Codegenerierung und dem Testen. Für jede Phase werden Paradigmen, Methoden, Techniken und Werkzeuge beschrieben und ihre praktische Anwendung in den Vordergrund gestellt. Darüber hinaus wird auf die Integration von Werkzeugen, funktionale Sicherheit und Metamodellierung eingegangen sowie die Einführung eines modellbasierten Ansatzes in einer Organisation und die Notwendigkeit zum lebenslangen Lernen erläutert. Der Leser erfährt in diesem Buch, wie ein modellbasiertes Vorgehen nutzbringend in der Praxis für die Softwareentwicklung eingesetzt wird. Das Vorgehen wird unabhängig von Modellierungswerkzeugen vorgestellt. Zahlreiche Beispiele – exemplarisch auch auf Basis konkreter Werkzeuge – helfen bei der praktischen Umsetzung. Y1 - 2018 SN - 978-3-86490-524-7 PB - dpunkt.Verlag CY - Heidelberg ER - TY - CHAP A1 - Renner, Sebastian A1 - Pozzobon, Enrico A1 - Mottok, Jürgen A1 - Hackenberg, Rudolf T1 - Benchmarking Software Implementations of 1st Round Candidates of the NIST LWC Project on Microcontrollers T2 - 3rd Lightweight Cryptography Workshop at NIST, Gaithersburg, USA N2 - This paper introduces a custom framework for benchmarking software implementations from the National Institute of Standards and Technology (NIST) Lightweight Cryptography (LWC) project on embedded devices. We present the design and core functions of the framework and apply it to various NIST LWC authenticated encryption with associated data (AEAD) ciphers. Altogether, we evaluate the speed of 213 submitted algorithm vari-ants on four different microcontroller units (MCUs), including 32 bit ARM and 8 bit AVR architectures. To allow a more meaningful comparison, we also conduct code size tests on all four boards and RAM utilization tests on one test platform. Y1 - 2019 UR - https://csrc.nist.gov/CSRC/media/Events/lightweight-cryptography-workshop-2019/documents/papers/benchmarking-software-implementations-lwc2019.pdf ER - TY - CHAP A1 - Hauser, Florian A1 - Gegenfurtner, Andreas A1 - Hutzler, Ivonne A1 - Reuter, Rebecca A1 - Mottok, Jürgen T1 - Eye movement patterns in source code review T2 - EARLI SIG 17 and 25 Biennial Conference 2018, Cambridge, United Kingdom N2 - This study is based on the work of Uwano, Nakamura, Monden and Matsumoto (2006) who tried to identify programmers’ eye movements in source code reviews by using eye tracking technology. The researchers were able to identify certain eye movement patterns but due to the technical limitations of earlier eye tracking systems and a small sample they could not find a valid proof for their existence. Now, twelve years later, the eye tracking technology has made significant improvements and is able to capture programmers’ reading behavior in an unobtrusive and precise way. Now the goal is to verify the described patterns by using eye tracking data from expert and novice programmers. In the experiment they have to detect errors in six different codes and take part in a retrospective interview. At the moment, data collections are ongoing. At the time of the conference, we will present the results of our analyses. Y1 - 2018 ER - TY - CHAP A1 - Hutzler, Ivonne A1 - Hauser, Florian A1 - Reuter, Rebecca A1 - Mottok, Jürgen A1 - Gruber, Hans T1 - Will the noun/verb analysis be used to generate class diagrams? An eye tracking study T2 - IATED, 11th International Conference of Education, Research and Innovation (ICERI 2018), 12-14 November 2018, Seville, Spain Y1 - 2018 U6 - https://doi.org/10.21125/iceri.2018.1103 SP - 505 EP - 514 ER - TY - CHAP A1 - Hauser, Florian A1 - Mottok, Jürgen A1 - Reuter, Rebecca A1 - Hutzler, Ivonne A1 - Gruber, Hans T1 - Eye movement patterns in software engineering – What differs the expert from the novice? T2 - IATED, 11th International Conference of Education, Research and Innovation (ICERI 2018), 12-14 November 2018, Seville, Spain Y1 - 2018 U6 - https://doi.org/10.21125/iceri.2018.1129 ER - TY - RPRT A1 - Hauser, Florian A1 - Mottok, Jürgen ED - Baier, Wolfgang T1 - Eye movement patterns im Software Engineering T2 - Forschung 2018 / Ostbayerische Technische Hochschule Regensburg Y1 - 2018 UR - https://doi.org/10.35096/othr/pub-1382 SP - 48 EP - 49 ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Schmid, Michael A1 - Mottok, Jürgen T1 - PyFI – Fault Injection Plattform for Real Hardware T2 - 31th International Conference on Architecture of Computing Systems, ARCS Workshop 9-12 April 2018, Braunschweig, Germany N2 - Today, due to the rapidly evolving technology within the automotive industry, the automation level of cars is continuously increasing. As a consequence, the software code base implementing the automated driving functionality is growing in both, complexity and size. Simultaneously, the semiconductor industry continues with structure and voltage downscaling due to diminishing design margins and stringent power constraints. This trend leads to highly integrated hardware on the one hand, whilst provoking an increase in sensitivity against external causes for hardware faults, e.g., radiation effects or electromagnetic interference. Among the available dependability assessment techniques, fault injection (FI) is widely adopted and ISO 26262 strongly recommends applying it to validate, that functional and technical safety mechanisms are implemented correctly and effectively. We present PyFI (Python backend for Fault Injection), a fault injection backend for the Infineon Aurix TriCore which utilizes an iSystem On-chip Analyzer to inject faults into the application data or instructions that are visible at the assembly level. PyFI allows the injection of bit flips and stuck-at faults in memory and register cells of the hardware which trigger our error symptoms on application level. Furthermore, it implements fault collapsing algorithms to reduce the number of faults and the duration for single experiments by gathering statistics about the static and dynamic application execution. Y1 - 2018 UR - https://ieeexplore.ieee.org/document/8385427 SP - 1 EP - 7 ER - TY - CHAP A1 - Langer, Tobias A1 - Osinski, Lukas A1 - Schmid, Michael A1 - Mottok, Jürgen T1 - Work-in-Progress: Real-Time Scheduling of Parallel Applications with Gang Scheduling T2 - International Conference on Architecture of Computing Systems (ARCS) Workshop, 9-12 April 2018, Braunschweig, Germany N2 - Future embedded systems demand increasingly more computation performance, which can only be provided by exploiting parallelism in real-time applications. Due to scheduling and scalability issues, parallelism still is an open issue especially in hard real-time systems. In this work-in-progress paper, we describe and discuss a hierarchical gang-scheduling based approach to address the scalability issue. We use gang scheduling to schedule tasks consisting of multiple kernel level threads. The execution budget provided by the kernel level threads is used for scheduling of user level threads using a lightweight threading library running in user space. Further, the first steps towards an implementation in the realtime operating system kernel Erika OS are described and possible benefits and risks of this approach are shown. Y1 - 2018 ER - TY - CHAP A1 - Bartel, Alexander A1 - Soska, Alexander A1 - Wolff, Christian A1 - Hagel, Georg A1 - Mottok, Jürgen ED - Burghardt, M. ED - Wimmer, R. ED - Wolff, Christian ED - Womser-Hacker, C. T1 - Entwicklung eines Manifests für spielifizierte Hochschullehre T2 - Mensch und Computer 2017, Tagungsband N2 - In dieser Veröffentlichung präsentieren die Autoren erste Ergebnisse Ihrer Forschungsarbeit an einem Manifest für spielifizierte Hochschullehre. Ausgehend von einer Literaturrecherche über den aktuellen Forschungsstand werden erste Auszüge der aktuellen Arbeit dargestellt, auf deren Basis ein aktiver wissenschaftlicher Diskurs angeregt werden soll. Y1 - 2017 U6 - https://doi.org/10.18420/muc2017-mci-0277 SP - 299 EP - 304 CY - Regensburg ER - TY - CHAP A1 - Knietzsch, Marco A1 - Muckelbauer, Daniel A1 - Reuter, Rebecca A1 - Mottok, Jürgen ED - Chova, L. G. ED - Martínez, A. L. ED - Torres, I. C. T1 - Experimental Verification of Indicated Benefits Of Integrating Augmented Reality into Academic Software Engineering Classes T2 - IATED, 11th International Conference of Education, Research and Innovation (ICERI 2018), 12-14 November 2018, Seville, Spain Y1 - 2018 SN - 978-84-09-05948-5 U6 - https://doi.org/10.21125/iceri.2018.1057 SN - 2340-1095 SP - 243 EP - 252 ER - TY - CHAP A1 - Seidl, M. A1 - Krämer, Stefan A1 - Mottok, Jürgen T1 - Improving the reliability of an embedded real-time system by applying coded processing T2 - 4th Applied Research Conference, 5th July 2014, Ingolstadt Y1 - 2014 SN - 978-3-8440-2875-1 SP - 70 EP - 74 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Hansch, G. A1 - Staudte, Ch. A1 - Gerhager, S. A1 - Hackenberg, Rudolf A1 - Mottok, Jürgen ED - Mottok, Jürgen ED - Ziemann, Olaf T1 - Migration path for secure and economic smart power grid devices with transitional smart metering support T2 - Applied Research Conference 2012 (ARC 2012), 25./26. June 2012 Nuremberg Y1 - 2012 SN - 2012 978-3-8440-1093-0 SP - 63 EP - 69 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Renner, Sebastian A1 - Mottok, Jürgen ED - Trinitis, Carsten ED - Pionteck, Thilo T1 - Towards Key Management Challenges in the Smart Grid T2 - ARCS Workshop 2019 - 32nd International Conference on Architecture of Computing Systems, 20-21 May 2019, Copenhagen, Denmark N2 - The used technology in the power system is subject of great change. Through the use of smart devices, the systems in the power grid get interconnected between each other and remote networks. Especially the remote access to the critical smart grid environment involves new challenges in the area of security. To ensure the transmitted data and the access to the system is secured, cryptographic mechanisms have to be implemented. One critical part in this task is the management of cryptographic keys. This paper explains and defines a set of basic requirements for cryptographic key management in the smart grid. These requirements are derived from challenges present in common corporate environments. Then, basic approaches in the field of key management are stated and evaluated for the applicability in the power system. Different protocols for the implementation of key management strategies are shown and an assessment regarding their suitability for the defined requirements is conducted. KW - Cryptographic key management KW - smart grid security KW - post-quantum cryptography Y1 - 2019 UR - https://ieeexplore.ieee.org/document/8836205 SN - 978-3-8007-4957-7 PB - VDE-Verlag CY - Berlin ER - TY - CHAP A1 - De, Sangita A1 - Mottok, Jürgen A1 - Brada, Premek ED - Pinker, Jiří T1 - Design Approach to Platform Agnostic Service API Modeling for Interoperability of Cross-enterprise Vehicle Applications T2 - 26th 2021 International Conference on Applied Electronics (AE): 7-8 September 2021, University of West Bohemia, Pilsen, Czech Republik N2 - In the last few years, the collaboration of services between the service-oriented, cross-enterprise vehicle application frameworks has gradually increased to generate novel and more complicated vehicle services for the automotive industry. In these service collaboration scenarios, where heterogeneous application frameworks participate to realize complex vehicle services, a source of discord that emerges is that the service providers must always check, before the service deployment, whether the clients or service consumers on the other side of the communication link are compatible with a given service's API (Application Program Interface). While using standardized templates like ontologies for API's semantic specifications are crucial for a service discovery and semantic interoperability, nevertheless, accessing these service APIs' semantic data using a standardized and understandable syntactical specification template is also equally substantial to ease services interoperability. In fact, such complex service collaboration scenarios motivate this research work which proposes a design approach towards standardized, domain-specific, platform-agnostic semantic and syntactic specification of vehicle services API models. This paper also uses a typical vehicle domain case study to illustrate the design approach and a reference mapping between the platform-agnostic semantics specifications of a vehicle service API ontological model and its corresponding language-neutral, syntactic representation using the OpenAPI standard. KW - interoperability KW - Semantic Web KW - API KW - RESTful KW - ontology Y1 - 2021 SN - 978-80-261-0973-0 U6 - https://doi.org/10.23919/AE51540.2021.9542890 SP - 1 EP - 6 PB - IEEE ER - TY - CHAP A1 - De, Sangita A1 - Niklas, Michael A1 - Mottok, Jürgen A1 - Brada, Přemek T1 - A Semantic Analysis of Interface Description Models of Heterogeneous Vehicle Application Frameworks: An Approach Towards Synergy Exploration T2 - MODELSWARD 2019: Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development, 20.02.2019 - 22.02.2019, Prague, Czech Republic N2 - As the world is getting more connected, the demands of services in automotive industry are increasing with the requirements such as IoT (Internet of Things) in cars, automated driving, etc. Eventually, the automotive industry has evolved to a complex network of servi ces, where each organization depends on the other organizations, to satisfy its service requirements in different phases of the vehicle life cycle. Because of these heterogeneous and complex development environments, most of the vehicle component interface models need to be specified in various manifest ations to satisfy the semantic and syntactic requirements, specific to different application development environments or frameworks. This paperdescribes an approach to semantic analysis of components interfaces description models of heterogeneous frameworks, that are used for vehicle applications. The proposed approach intends to ensure that interface description models of different service-based vehicle frameworks can be compared, correlated and re-used based on semantic synergies, across different vehicle platforms, development environments and organizations. The approach to semantic synergy exploration could further provide the knowledge base for the increase in interoperability, overall efficiency and development of an automotive domain specific general software solutions, by facilitating coexistence of components of heterogeneous frameworks in the same high-performance ECU for future vehicle software. KW - Application: Framework KW - IDL KW - Semantic: Mapping Y1 - 2019 SN - 978-989-758-358-2 SP - 394 EP - 401 PB - SCITEPRESS ER - TY - CHAP A1 - De, Sangita A1 - Mottok, Jürgen A1 - Niklas, Michael A1 - Brada, Premek ED - Trinitis, Carsten ED - Pionteck, Thilo T1 - Semantic Synergy Exploration in Interface Description Models of Heterogeneous Vehicle Frameworks: Towards Automotive Meta Interface Description Model T2 - ARCS 2019: 32nd GI/ITG International Conference on Architecture of Computing Systems May 20 - 21, 2019, Technical University of Denmark, Copenhagen, Denmark Workshop, Proceedings N2 - This The vehicle is evolving to a complex network of heterogeneous subsystems of ECUs, sensors and actuators, each with different computational requirements. These sub-systems are connected via bus systems following different communication paradigms like e.g. signal based or service-oriented communications. This has led to the heterogeneous syntax of describing interfaces even though the semantics of the interfaces are similar. The wide variety of Interface Description Languages (IDLs) in automotive industry hinders partly with the efficient collaboration between different suppliers and the OEMs in the automotive industry. Given this wide variety of automotive IDLs, what could be more beneficial, from a software engineering point of view, is a generic automotive domain specific IDL that can satisfy all the fundamental requirements of the heterogeneous subsystems. This paper describes an approach to compare and correlate IDLs based on semantic similarities of the languages, considering the two aspects: application description and underlying message frameworks used in the different domains of given automotive subsystems. With the exploration of semantic synergies between the IDLs, various domain specific and domain-agnostic frameworks can be compared and correlated. The results can be generalized and abstracted to define a generic Meta IDL which could support use cases like e.g. domain-agnostic functional models and migration of software components between different kinds of automotive subsystems. Y1 - 2019 UR - https://ieeexplore.ieee.org/document/8836199 SN - 978-3-8007-4957-7 SP - 63 EP - 70 PB - VDE VERLAG CY - Berlin ER - TY - CHAP A1 - Thomeczek, Ludwig A1 - Attenberger, Andreas A1 - Kolb, Johannes A1 - Matoušek, Vaclav A1 - Mottok, Jürgen ED - Trinitis, Carsten ED - Pionteck, Thilo T1 - Measuring Safety Critical Latency Sources using Linux Kernel eBPF Tracing T2 - ARCS 2019: 32nd International Conference on Architecture of Computing Systems : workshop proceedings, May 20- 21, 2019, Technical University of Denmark, Copenhagen, Denmark Y1 - 2019 UR - https://ieeexplore.ieee.org/abstract/document/8836200 SN - 978-3-8007-4957-7 PB - VDE VERLAG GMBH CY - Berlin ER - TY - JOUR A1 - Schmid, Michael A1 - Fritz, Florian A1 - Mottok, Jürgen T1 - Fine-Grained Parallel Applications in Real-Time Multiprocessor Systems JF - Journal of Systems Architecture N2 - Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems. In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture. KW - Real-time KW - Work-stealing KW - Thread pool KW - Task model KW - Parallel programming Y1 - 2021 U6 - https://doi.org/10.1016/j.sysarc.2022.102393 VL - 124 PB - Elsevier ER - TY - JOUR A1 - Weiss, Nils A1 - Pozzobon, Enrico A1 - Mottok, Jürgen A1 - Matoušek, Václav T1 - Automated Reverse Engineering of CAN Protocols JF - Neural Network World N2 - Car manufacturers define proprietary protocols to be used inside their vehicular networks, which are kept an industrial secret, therefore impeding independent researchers from extracting information from these networks. This article describes a statistical and a neural network approach that allows reverse engineering proprietary controller area network (CAN)-protocols assuming they were designed using the data base CAN (DBC) file format. The proposed algorithms are tested with CAN traces taken from a real car. We show that our approaches can correctly reverse engineer CAN messages in an automated manner. Y1 - 2021 U6 - https://doi.org/10.14311/NNW.2021.31.015 SN - 1210-0552 VL - 31 IS - 4 SP - 279 EP - 295 ER - TY - JOUR A1 - De, Sangita A1 - Niklas, Michael A1 - Brian, Rooney A1 - Mottok, Jürgen A1 - Brada, Premek T1 - Semantic Mapping of Component Framework Interface Ontologies for Interoperability of Vehicle Applications JF - Procedia Computer Science N2 - Over the past few years, ontology merging, and ontology semantic alignment has gained significant interest as research topics in automotive application domain for finding solutions to semantic data heterogeneity. To accomplish the complex and novel vehicle service requirements such as autonomous driving, V2X (Vehicle-to-Vehicle communication), etc. the automotive applications involve collaborations of several platform-specific data from heterogeneous enterprises component frameworks and consequently there has been increase in data interoperability issues. At the application component level, data interoperability relies on the semantic alignment or mapping between the various component framework interfaces data models represented as XML schemas (XSD). With the XML schemas being the preferred standard for the interface description exchange between most of the automotive application domain components, however, the data interoperability between the semantically equivalent but structurally different data constructs of multiple heterogeneous XSDs stands as a challenge in the absence of an ontology-based approach. To confront this crucial requirement for data interoperability and to increase in effect the reuse of existing components through their interfaces, we propose an approach to semantically map the various component framework interface data models when expressed as ontology schemas, based on the exploration of semantic synergies. The transformation between XSD and RDF (Resource Description Framework) schema representations and the use of queries over the ontology schemas for semantic mapping are demonstrated including a real-world case study. KW - component KW - interface KW - mapping KW - ontology KW - semantic Y1 - 2020 U6 - https://doi.org/10.1016/j.procs.2020.03.151 VL - 170 IS - 2 SP - 813 EP - 818 PB - Elsevier ER - TY - CHAP A1 - Schmid, Michael A1 - Mottok, Jürgen ED - Queudet, Audrey T1 - Response Time Analysis of Parallel Real-Time DAG Tasks Scheduled by Thread Pools T2 - 29th International Conference on Real-Time Networks and Systems (RTNS 2021): 07.04. - 09 04 2021, Nantes, France N2 - Modern high-end embedded systems nowadays have to process enormous amounts of data. In order to speed up the computations and fully exploit the resources of the underlying hardware architectures, software developers can avail parallelism frameworks such as Intel Threading Building Blocks or compiler extensions as OpenMP. They ease the development of parallel applications by providing interfaces for common parallel design patterns and by internally distributing the work among the workers of a thread pool. However, such frameworks and compiler extensions do not yet support the stringent timing requirements of real-time systems and therefore, an adaption of their computation model to the sector of real-time systems needs to be conducted. In this paper, we address the problem of scheduling parallel real-time directed acyclic graphs tasks on multiprocessor architectures where the subtasks are dispatched among and executed by the workers of a thread pool. In contrast to existing work in the state-of-the-art, we limit the maximum parallelism of real-time tasks not by the number of processors in the system, but by the number of worker threads used in the thread pool of each real-time application. For this model, we derive a worst-case response time analysis for task sets scheduled by a preemptive global fixed-priority scheduler. In order to evaluate the performance of our response time analysis, we further perform schedulability tests on generated task sets and compare the results to existing feasibility analyses in the current state-of-the-art. KW - directed acyclic graph KW - parallel task KW - Real-time systems KW - real-time, scheduling KW - response time analysis KW - thread pool Y1 - 2021 SN - 9781450390019 U6 - https://doi.org/10.1145/3453417.3453419 SP - 173 EP - 183 PB - Association for Computing Machinery CY - New York ER -