TY - CHAP A1 - Thiel, P. A1 - Hackl, Magnus A1 - Mottok, Jürgen T1 - Designing efficient Node.js applications – Approaching useful patterns T2 - 4th Applied Research Conference, 5th July 2014, Ingolstadt Y1 - 2014 SN - 978-3-8440-2875-1 SP - 40 EP - 46 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Hackl, Magnus A1 - Thiel, Patrik A1 - Mottok, Jürgen T1 - Not Only SQL – a comparison to traditional RDBMS T2 - 4th Applied Research Conference (ARC 2014), 5th July 2014, Ingolstadt Y1 - 2014 SN - 978-3-8440-2875-1 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Raab, Peter A1 - Mottok, Jürgen T1 - Modellbasierte Zuverlässigkeitsanalysen von arithmetischen Operationen in einem Prozessorsystem T2 - Proceedings of safe.tech 2014, 20. und 21. Mai 2014, München Y1 - 2014 ER - TY - CHAP A1 - Oklapi, Erna A1 - Deubzer, Michael A1 - Schmidhuber, Stefan A1 - Lalo, Erjola A1 - Mottok, Jürgen T1 - Optimization of Real-Time Multicore Systems Reached by a Genetic Algorithm Approach for Runnable Sequencing T2 - 2014 International Conference on Applied Electronics, Pilsen, Czech Republic N2 - The deployment of complex real-time systems with everyday increasing demands and possibilities, is a challenging task for engineers when performance and efficiency have to be maximized while cost have to be minimized at the same time. For already designed systems it became necessary to perform different modifications in order to find optimal software architecture configuration by respecting all timing constraints which are essential when speaking of real-time systems. In this work, we present a model-based approach of optimizing the execution sequence of runnables within tasks in order to reduce the system's reaction times by improving the overall signal flow duration. Hereby, a genetic optimization algorithm is used to create and evaluate multiple solutions for the runnable sequencing problem. We conclude by demonstration the efficiency of the presented approach with experimental results. KW - runnable sequencing KW - embedded real-time systems KW - genetic algorithms KW - multi-core KW - optimization Y1 - 2014 U6 - https://doi.org/10.1109/AE.2014.7011709 SP - 233 EP - 238 ER - TY - CHAP A1 - Mottok, Jürgen A1 - Alfranseder, Martin A1 - Schmidhuber, Stefan A1 - Mucha, Matthias A1 - Sailer, Andreas ED - Teodorescu, Horia-Nicolai ED - Kirschenbaum, Alan ED - Cojocaru, Svetlana ED - Bruderlein, Claude T1 - How to improve the reactiveness and efficiency of embedded multicore systems by use of probabilistic simulation and optimization techniques T2 - Improving Disaster Resilience and Mitigation - New Means and Tools. NATO Science for Peace and Security Series C: Environmental Security N2 - Safe and reliable multi-core technology becomes more and more important in the field of embedded systems. Today’s and future embedded systems require increasing performance while being more energy efficient. Moreover, the functional safety for these embedded systems has to be improved or developed completely new. In this chapter, we first address the challenges of embedded multi-core real-time systems. To raise the resilience of such systems we use the deadlock-free synchronization model of Block et al. (A flexible real-time locking protocol for multiprocessors. 2012 IEEE international conference on embedded and real-time computing systems and applications, vol 0, pp 47–56, 2007). The metric mean Normalized Blocking Time (mNBT) is hereby used to measure the timing effects of the blocking behavior of strongly interacting tasks. In a second step, we present a model-based approach to map the tasks of an embedded real-time system to the cores of a multi-core processor. Moreover, we derive an execution time model from runtime measurements of software functions. This information is then used to perform precise probabilistic simulations of different task-to-core mappings and evaluate them with regard to task response times, inter-task blocking overhead and load distribution. Subsequently, we integrate the probabilistic simulation within an optimization technique to systematically improve the task-to-core mapping. We conclude with a case-study, where we demonstrate the effectiveness of the presented approach by optimizing the task-to-core mapping of a practical automotive powertrain system. KW - Embed System KW - Functional Safety KW - Arrival Curve KW - Task Allocation Problem KW - Deadline Violation Y1 - 2014 U6 - https://doi.org/10.1007/978-94-017-9136-6_16 SP - 253 EP - 268 PB - Springer CY - Dodrecht ER - TY - CHAP A1 - Soska, Alexander A1 - Mottok, Jürgen T1 - A New Conceptual Contribution for Serious Games in Academic Software Engineering Education T2 - European Conference on Software Engineering Education 2014 (ECSEE), 27 and 28 November 2014 in Seeon Monastery N2 - Nowadays, the popularity and field of application of serious games grows steadily. This educational method offers attractive pportunities for teaching and training by combining playful elements with learning content. By using game mechanics, thinking and technique, theoretical subject matters are treated in a fun and engaging way. Thereby, serious games utilize our intrinsic motivation to discover the surroundings in a playful manner. Embedded in educational settings, the goal is to mediate academic and non-academic knowledge to the students. Especially in the field of software engineering it is important to have skills which go beyond pure technical knowledge. Yet, the use of serious games is still a manageable amount. With this paper, we give a contribution to the theoretical design and development of serious games based on playful learning method and its relation to research-based learning in universal context. In addi- tion we analyze the existing serious games in software engineering and present our thoughts about planning our own. Y1 - 2014 UR - https://www.researchgate.net/publication/277266392_A_New_Conceptual_Contribution_for_Serious_Games_in_Academic_Software_Engineering_Education SN - 978-3-8440-3067-9 SP - 241 EP - 254 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Alfranseder, Martin A1 - Mucha, Matthias A1 - Schmidhuber, Stefan A1 - Sailer, Andreas A1 - Niemetz, Michael A1 - Mottok, Jürgen T1 - A modified synchronization model for dead-lock free concurrent execution of strongly interacting task sets in embedded systems T2 - 2013 International Conference on Applied Electronics (AE 2013), IEEE, 10-12 September 2013, Pilsen, Czech Republic N2 - Global scheduling algorithms are very promising for application in embedded real-time systems using multi-core controllers. In this paper we want to make a first step forward to apply such scheduling methods on real existing systems. Especially a new resource model is necessary to avoid deadlocks, as this goal can not be achieved by using the standard OSEK Priority Ceiling Protocol when shared global resources are in use. We also introduce the new metric mean Normalized Blocking Time in order to be able to compare locking mechanisms according to the timing effects of their blocking behavior. Finally we give a simulative application example of the new metric by the use of two different kinds of semaphore models and an example task set typical for existing embedded real-time systems in the automotive powertrain environment. Y1 - 2013 VL - 18 SP - 13 EP - 18 ER - TY - CHAP A1 - Raab, Peter A1 - Krämer, Stefan A1 - Mottok, Jürgen T1 - Error Model and the Reliability of Arithmetic Operations T2 - 2013 IEEE EUROCON - International Conference on Computer as a Tool, Zagreb, Croatia, July 1-4, 2013 N2 - Error detecting and correcting codes are widely used in data transmission, storage systems and also for data processing. In logical circuits like arithmetic operations, arbitrary faults can cause errors in the result. However in safety critical applications, it is important to avoid those errors which would lead to system failures. Several approaches are known to protect the result of operations during software processing. In the same way like transmission systems, coded processing uses codes for fault detection. But in contrast to transmission systems, there is no adequate channel model available which makes it possible to evaluate the residue error probability of an arithmetic operation in an analytical way. This paper tries to close the gap of arithmetic error models by the development of a model for an ordinary addition in a computer system. Thus, the reliability of an addition's result can be analytically evaluated. KW - addition KW - channel model KW - coded processing KW - fault simulation KW - Markov model KW - residue error probability Y1 - 2013 U6 - https://doi.org/10.1109/EUROCON.2013.6625047 SP - 630 EP - 637 ER - TY - CHAP A1 - Raab, Peter A1 - Racek, Stanislav A1 - Krämer, Stefan A1 - Mottok, Jürgen T1 - Data Flow Analysis of Software Executed by Unreliable Hardware T2 - 16th Euromicro Conference on Digital System Design, Los Alamitos, CA, USA N2 - The data flow is a crucial part of software execution in recent applications. It depends on the concrete implementation of the realized algorithm and it influences the correctness of a result in case of hardware faults during the calculation. In logical circuits, like arithmetic operations in a processor system, arbitrary faults become a more tremendous aspect in future. With modern manufacturing processes, the probability of such faults will increase and the result of a software's data flow will be more vulnerable. This paper shows a principle evaluation method for the reliability of a software's data flow with arbitrary soft errors also with the concept of fault compensation. This evaluation is discussed by means of a simple example based on an addition. KW - data flow KW - error probability KW - fault compensation KW - reliability analysis KW - software-implemented-hardwarefault-tolerance (SIHFT) Y1 - 2013 U6 - https://doi.org/10.1109/DSD.2013.35 SP - 243 EP - 249 ER - TY - CHAP A1 - Oklapi, Erna A1 - Deubzer, Michael A1 - Schmidhuber, Stefan A1 - Mottok, Jürgen T1 - Verification of an Evolutionary Optimization Algorithm for Runnable Sequencing Problem T2 - 4th Applied Research Conference, 5th July 2014, Ingolstadt Y1 - 2014 ER -