TY - CHAP A1 - Hofmann, Matthias A1 - Bierl, Rudolf A1 - Rück, Thomas T1 - Implementation of a dual-phase lock-in amplifier on a TMS320C5515 digital signal processor T2 - Proceedings of the 5th European DSP Education and Research Conference (EDERC), 13-14 Sept. 2012, Amsterdam N2 - A digital dual-phase lock-in amplifier that is capable to run on a low-cost, low-power platform comprising a 16-bit fixed-point digital signal processor was developed. This is achieved by a set of optimised digital filters including an exponential averager to adjust the time constant of the overall filter. The reference frequency is generated using a direct digital synthesis source utilising angle decomposition with a resolution of 1 Hz. The digital lock-in algorithm is described and the performance of the algorithm is analysed. The experimental results show that the developed lock-in amplifier achieves similar performance to a commercially available lock-in amplifier. Y1 - 2012 U6 - https://doi.org/10.1109/EDERC.2012.6532217 ER -