TY - CHAP A1 - Asgharzade, Ali A1 - Bartl, Mathias A1 - Hausladen, Matthias A1 - Chen, Yang A1 - Buchner, Philipp A1 - Edler, Simon A1 - Bachmann, Michael A1 - She, Juncong A1 - Schreiner, Rupert T1 - Investigation on the influence of internal voltage drops on the emission behavior of silicon field emission arrays using CMOS image sensor T2 - 38th International Vacuum Nanoelectronics Conference (IVNC) N2 - In this paper we report on an improved measurement and analysis method for determining the emission current distribution of field emitter arrays with CMOS sensors. It can also be used for field emission arrays where not all surfaces of the emitters are at the same electrical potential (e.g. for p-doped Si tips, where a strong current saturation occurs). To demonstrate the functionality of this method, a n-doped field emission array was measured using a variable external series resistance. Brightness variations in emission spots were analyzed to re-calculate the known series resistances for comparison. The re-calculated value is in good agreement with the actual value of the resistance. This method offers a quantitative approach to assess internal voltage drop effects on field emission using optical readout KW - field emission imaging KW - field emission KW - CMOS sensor Y1 - 2025 U6 - https://doi.org/10.1109/IVNC65669.2025.11120937 PB - IEEE ER - TY - JOUR A1 - Buchner, Philipp A1 - Hausladen, Matthias A1 - Bartl, Mathias A1 - Bachmann, Michael A1 - Schreiner, Rupert T1 - High current field emission from Si nanowires on pillar structures JF - Journal of Vacuum Science and Technology B: Nanotechnology and Microelectronics N2 - We investigate the influence of the geometry and doping level on the performance of n-type silicon nanowire field emitters on silicon pillar structures. Therefore, multiple cathodes with 50 by 50 pillar arrays (diameter: 5 μm, height: 30 μm, spacing: 50 μm) were fabricated and measured in diode configuration. In the first experiment, we compared two geometry types using the same material. Geometry 1 is black silicon, which is a highly dense surface covering a forest of tightly spaced silicon needles resulting from self-masking during a plasma etching process of single crystal silicon. Geometry 2 are silicon nanowires, which are individual spaced-out nanowires in a crownlike shape resulting from a plasma etching process of single crystal silicon. In the second experiment, we compared two different silicon doping levels [n-type (P), 1–10 and <0.005 Ω cm] for the same geometry. The best performance was achieved with lower doped silicon nanowire samples, emitting 2 mA at an extraction voltage of 1 kV. The geometry/material combination with the best performance was used to assemble an integrated electron source. These electron sources were measured in a triode configuration and reached onset voltages of about 125 V and emission currents of 2.5 mA at extraction voltages of 400 V, while achieving electron transmission rates as high as 85.0%. KW - Doping KW - Electron sources KW - Nanowires KW - Plasma processing KW - Field emitter arrays KW - Triodes KW - Semiconductors Y1 - 2024 U6 - https://doi.org/10.1116/6.0003384 SN - 2166-2754 VL - 42 IS - 2 PB - AIP ER -