TY - CHAP A1 - Schubert, Martin J. W. T1 - Mixed-Signal Event-Driven Simulation of a Phase-Locked Loop T2 - IEEE/VIUF International Workshops on Behavioral Modeling and Simulation (BMAS'99), October 4-6 1999, Orlando, Florida, USA N2 - The mixed-signal event-driven (MixED) simulationalgorithm using standard VHDL is capable of modelinga number of analog and mixed-signal problems in digital circuits, e.g. RCL networks representing pads or wires, charge pumps, dynamic logic, voltage-controlledoscillators, phase-locked loops, etc. Important featuresare single-kernel simulation as well as rapid A/D andD/A interfacing. This paper demonstrates the simulation of a phase-locked loop (PLL), which is one of the most interesting applications of the MixED method. Many digital designs contain a PLL as only mixed-signal building block. The MixED method allows to simulate such designs with standard VHDL. KW - mixed-signal event-drivensimulation KW - standard VHDL KW - analog models KW - PLL Y1 - 1999 UR - https://hps.hs-regensburg.de/~scm39115/homepage/research/mixed/mixed_publications/1999_bmas_pll.pdf ER - TY - CHAP A1 - Schubert, Martin J. W. T1 - VHDL Based Simulation of a Sigma-Delta A/D Converter T2 - EEE/ACM International Workshop on Behavioral Modeling and Simulation (BMAS2000), October 19-20 2000, Orlando, Florida, USA, prodeedings N2 - The VHDL based mixed-signal event-driven (MixED) simulation method is employed to simulate a sigma-delta modulator for A/D conversion. Results are verified by experimental data and comparison to PSpice-AD simulations. Y1 - 2000 U6 - https://doi.org/10.1109/BMAS.2000.888367 ER - TY - CHAP A1 - Schubert, Martin J. W. T1 - VHDL Based Simulation of a Delta-Sigma A/D Converter Clocked with a Phase-Locked Loop T2 - Design, Automation and Test in Europe, DATE'2001 Conference, March 13-16 2001, Munich N2 - The VHDL based mixed-signal event-driven (MixED) simulation method is employed to simulate a comprehensive system containing a number of mixed-signal building blocks: an analog waveform generator, a phase-locked loop and two ∆Σ modulators for A/D conversion. Y1 - 2001 UR - https://hps.hs-regensburg.de/~scm39115/homepage/research/mixed/mixed_publications/2001_date_pll_sigmadelta.pdf ER - TY - JOUR A1 - Schubert, Martin J. W. T1 - An Analog Node Model for VHDL Based Simulation of RF Integrated Circuits JF - IEEE Transactions on Circuits and Systems I, Regular Papers N2 - This paper describes a very-high-speed integrated-circuit hardware description language (VHDL)-based analog-node model, an associated driver component for the mixed-signal event-driven (MixED) simulation technique, and some primitive device models applied to radio-frequency integrated circuits. With the presented MixED method, analog circuits are modeled as a composition of controlled sources. Unlike other VHDL-based analog simulation methods, these MixED sources compute not only a real number representing an output voltage but also an output impedance. This allows the outputs of several MiXED sources to be connected in order to drive the same node signal n . The voltage of this record-type signal is automatically computed at its element n . u by resolution functions in compliance with Kirchhoff's current law. The data structure of the node signal n , its self-defined resolution functions, and an associated driver component are presented and discussed to meet different simulation requirements, such as speed, versatility, current accuracy, and adaptive time stepping. Several examples demonstrate how to behaviorally model mixed-signal components with this method with an emphasis on the simulation of a heterodyne receiver. Simulation speeds are compared to VHDL-AMS tools. KW - Integrated circuit modeling KW - Radio frequency KW - Analog integrated circuits KW - Radiofrequency integrated circuits KW - Computational modeling KW - Circuit simulation KW - Voltage KW - Signal resolution KW - Hardware design languages KW - Driver circuits Y1 - 2009 U6 - https://doi.org/10.1109/TCSI.2009.2027799 VL - 56 IS - 12 SP - 2717 EP - 2727 ER - TY - CHAP A1 - Lee, Wai-Kong A1 - Schubert, Martin J. W. A1 - Ho, Stanley Jian-Qin T1 - Multi-source energy harvesting and storage for floating wireless-sensor-network nodes T2 - 2016 IEEE Industrial Electronics and Applications Conference (IEACon 2016), 20.-22. Nov. 2016, Kota Kinabalu, Malaysia Y1 - 2016 SN - 9781509009268 ER - TY - CHAP A1 - Schubert, Martin J. W. T1 - System Contemplations for Precision Irrigation in Agriculture T2 - AIP Conference Proceedings N2 - This communication contemplates political, biological and technical aspects for efficient and profitable irrigation in sustainable agriculture. A standard for irrigation components is proposed. The need for many, and three-dimensionally distributed, soil measurement points is explained, thus enabling the control of humidity in selected layers of earth. Combined wireless and wired data transmission is proposed. Energy harvesting and storage together with mechanical sensor construction are discussed. Y1 - 2017 SN - 9780735414969 U6 - https://doi.org/10.1063/1.4979393 VL - 1828 IS - 1 ER - TY - CHAP A1 - Schubert, Martin J. W. A1 - Seign, Stefan A1 - Dai, Q. A1 - Hinterseer, Sebastian A1 - Pielmeier, F. A1 - Pietsch, Alexander A1 - Seebauer, C. A1 - Weiß, Josef A1 - Yu, C. A1 - Zenger, Stefan T1 - Capacitive Sensor Technology for Soil Moisture Monitoring Networks T2 - 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 5-8 Dec. 2017, Batumi, Georgia N2 - A sensor technology for tracking soil-moisture in agricultural fields is presented. A linear measurement method was developed to satisfy the need for cheap sensors with wide range of capacitance change such as factor 30. A combined wired and wireless network transmits data to a server. Various battery aspects are compared with respect to use in agriculture. Y1 - 2017 U6 - https://doi.org/10.1109/ICECS.2017.8292018 SP - 190 EP - 193 ER - TY - PAT A1 - Schubert, Martin J. W. A1 - Seign, Stefan T1 - Arrangement for Measuring Capacitance Y1 - 2016 ER - TY - JOUR A1 - Schubert, Martin J. W. T1 - 70V-to-5V Differential CMOS Input Interface JF - IEE Electronic Letters Y1 - 1994 U6 - https://doi.org/10.1049/el:19940235 VL - 30 IS - 4 SP - 296 EP - 297 ER - TY - PAT A1 - Schubert, Martin J. W. T1 - Verfahren zur Simulation von Netzwerken auf einer ereignisgesteuerten Zeitachse mittels verteilter, lokaler Iteration Y1 - 1996 ER -