TY - CHAP A1 - Kampmann, Matthias A1 - Mottok, Jürgen T1 - A ‘laboratory’ as an approach to foster writing skills at software engineering studies learning software engineering is easier when writing courses are directly dpplied to lecture’s content and the problems and examples enrolled in T2 - 2018 IEEE Global Engineering Education Conference, EDUCON 2018, Santa Cruz de Teneriffe, Spanien N2 - Writing, with no doubt, is besides reading a core competency which allows us to "exploit" knowledge in general. It also makes possible the exploration of software engineering's core issues. Especially within this context it is necessary to master the reading of complex texts as well as to be able to write in an appropriate academic expression. With regard to studies in software engineering this seems to be obvious, but in fact the opposite is the reality. Therefore measures to improve these skills seemed to be necessarily applied. At the Ostbayerische Technische Hochschule (OTH, University of Applied Sciences, Regensburg) a new format, the so called c*lab, was installed during the winter semester 2017. This was a course which followed the principle of "Writing Across the Curriculum" (WAC). Organized parallel to a lecture of learning how to program the language C, and addressing students of the first semester, the course was a complete voluntary offer in addition to the general standard courses and lectures of the faculty. Students who participated not only reflected on C and its principles, nor only on writing as a self purpose, but they also learned to express technical thoughts and ideas by the use of didactic methods. The idea to transfer also basic LTeX concepts to write a paper based on the IEEE bare_conf.tex-template were also planned. The course followed the idea of student's-centred learning. This paper presents the main structure, goals, and means of the c*lab, and the theory behind. It also embeds the course within the horizon of experiences of teaching writing skills at the Laboratory for Safe and Secure Systems (LaS 3 ) at the faculty of electronic and information engineering at the OTH Regensburg. First experiences have shown that participants increase writing skills and their idea of the importance of writing. Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363326 SP - 900 EP - 908 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Jahn, Sabrina A1 - Figas, Paula A1 - Bartel, Alexander A1 - Mottok, Jürgen A1 - Hagel, Georg T1 - Learning Tasks for Software Engineering Education: An exemplary development of learning tasks for software engineering based on didactic function and knowledge type T2 - Proceedings of the 3rd European Conference of Software Engineering Education (ECSEE'18), JUne 2018, Seeon, Bavaria, Germany N2 - Learning tasks play an important role in education and especially in higher education. However, there is a significant lack in research regarding these in higher education. A learning task shows several characteristics, whereas the didactic function of a task is mostly considered. Two characteristics of learning tasks are focused in this paper: The didactic function and the type knowledge. Existing types of learning tasks are presented as well as a proposal for learning tasks in software engineering education that considers didactic functions, like elaboration, training or application and types of knowledge, i.e. factual, conceptual, procedural and metacognitive knowledge. This paper aims to serve as a guidance for lecturers who have the purpose to create learning tasks that address both characteristics -- the didactic function and the type of knowledge. Y1 - 2018 U6 - https://doi.org/10.1145/3209087.3209097 SP - 1 EP - 7 ER - TY - CHAP A1 - Lalo, Erjola A1 - Weber, Raphael A1 - Sailer, Andreas A1 - Mottok, Jürgen A1 - Siemers, Christian T1 - On Solving Task Allocation and Schedule Generation for Time-Triggered LET Systems using Constraint Programming T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - The amount of safety-critical embedded systems in automotive development is heavily growing. Ensuring their reliability not only increases the complexity of functions but also requires determinism at design and execution time, which is considerably challenging to fulfill and verify for multi-core processors. The Logical Execution Time (LET) is recently recognized in automotive industry as an approach for ensuring deterministic functional behavior. However, to decrease the manual design effort and time for deploying such complex systems to multi-core platforms and for ensuring their strict timing and safety requirements, automatic solutions are needed. This work presents a solution for allocating tasks to multi-core processors and generating a time-triggered schedule for embedded systems considering safety, timing, and LET semantics. The approach we propose solves both challenges by defining them as a Constraint Satisfaction Problem (CSP). To examine our CSP formulation, we use MiniZinc, which is a solver-independent constraint modeling language that can employ a variety of solvers. In a case study, we explore optimizations of an industrial system that are enabled by scheduling and task allocation design decisions. Further, the performance of the proposed solutions is evaluated based on large set of synthetically generated system models. Y1 - 2019 UR - https://ieeexplore.ieee.org/abstract/document/8836201 SP - 1 EP - 8 ER - TY - CHAP A1 - Nagengast, Christian A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Synchronization Techniques for Parallel Redundant Execution of Applications T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - In fault tolerant systems, applications are replicated and executed to enable error detection and recovery. If one replica application fails, another is able to take its place and provide the correct results. This concept can benefit from parallel execution on separate execution units. The rise of multicore platforms supports the development of parallel software, by providing the adequate hardware. However, this raises challenges regarding the synchronization of the redundant strings of execution. Replica determinism means that given the same input, identical programs provide the same output. To ensure replica determinism, requirements regarding the synchronization can be split in two domains: data and time. This paper examines the state of the art of synchronization techniques for parallel replicated execution in the context of fault tolerant systems. We analyze the requirements regarding synchronization within the time and data domain and compare different concepts of hardware (multicore, multiprocessor and multi-PCB) and software (processes, threads). Y1 - 2019 UR - http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8836209&isnumber=8836190 SP - 1 EP - 8 PB - IEEE ER - TY - CHAP A1 - Weiherer, Kerstin A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Software-Based Triple Modular Redundancy with Fault-Tolerant Replicated Voters T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - New computing-intensive applications such as assisted or highly automated driving are rapidly expanding the domain of safety-critical embedded systems, driven by the vision of the driverless car. This development makes it necessary to use high performance multi-core systems which are commercially available and provide more parallelism in terms of redundant execution units, however, at the cost of being less reliable. With the continuous down-scaling of semiconductor technology, computing hardware exhibits an increasing vulnerability against random hardware faults. Since these high-performance controller provide less or no hardware redundancy to ensure a safe execution of the application, software-only fault tolerance approaches are under current investigation. Our Scalable Software Support for Dependable Embedded Systems (S3DES) approach achieves fault tolerance by utilizing software-based triple modular redundancy for computational and optimized arithmetic encoded voter processes to ensure fault detection and error handling on application level. In S3DES voters are replicated to allow the compensation of voting failures. However, new challenges with regard to error propagation and multiple voting result outputs are introduced by this extension. We describe how mutual voter monitoring and threshold value checks could be used to establish a hierarchy among the replicated voters without re-introducing a reliability bottleneck in the sense of a single point of failure and resolve the aforementioned challenges. Y1 - 2019 UR - https://ieeexplore.ieee.org/abstract/document/8836210 SP - 1 EP - 8 ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Control Flow Errors: A Discussion of Different Injection Strategies T2 - 32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark N2 - Among the available dependability assessment techniques, fault injection (FI) is widely adopted and strongly recommended by safety standards for the validation that functional and technical safety mechanisms are implemented correctly and effectively. The main challenge in fault injection assessments is the increasing complexity of system-on-chips as well as the increasing size of memory, which leads to enormous efforts to test every possible fault introduced to the system. Therefore, a number of publicly available fault injection frameworks utilize fault space pruning techniques to reduce the overall fault space and consequently the overall experiment duration. Most of the fault space pruning techniques mainly discuss the reduction of the number of data errors which have to be injected into registers and memory locations. However, control flow errors represent a further domain of possible errors on the application level. Usually for the evaluation of effectiveness of fault tolerance mechanisms against data errors, a single fault assumption at microarchitectural level (e.g. bit-flips) is assumed. In most cases, this assumption is equivalently applied to the program counter to investigate possible control flow errors. Due to this approach, the error space is consciously or unconsciously reduced to the possible erroneous jump targets that can be reached by a specific set of bit-flips in the program counter at a specified time during the program execution. This approach is considered valid regarding the corresponding fault assumption, but leads to negative effects on the significance of the injection and the resulting effectiveness of the tested fault tolerance mechanism. In this paper, we discuss different strategies for the analysis and injection of control flow errors and the resulting differences by considering the single fault assumption at microarchitectural and application level. Y1 - 2019 UR - http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8836207&isnumber=8836190 SP - 1 EP - 7 ER - TY - CHAP A1 - Mottok, Jürgen A1 - Reichenberger, Marcus T1 - Use of Static Analysis and Coding Guidelines in embedded Systems Software T2 - 1st Applied Research Conference, ARC 2019, 8 July 2019, Regensburg Y1 - 2019 SN - 978-3-96409-182-6 SP - 571 EP - 578 PB - Pro BUSINESS ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - A Multicore Fault Tolerance Approach Based on Coded Processing T2 - Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France N2 - Development trends for computing platforms moved from increasing the frequency of a single processor to increasing the parallelism with multiple cores on the same die. Multiple cores have strong potential to support cost-efficient fault tolerance due to their inherent spatial redundancy. This work makes a step towards software-only fault tolerance in the presence of permanent and transient hardware faults. Our approach utilizes software-based spatial triple modular redundancy and coded processing on a shared memory multi-core controller. We evaluate our approach on an Infineon AURIX TriBoard TC277 and provide experimental evidence for error resistance by fault injection campaigns with an iSystem iC5000 On-chip Analyzer. Y1 - 2018 UR - https://hal.archives-ouvertes.fr/hal-02156233 ER - TY - CHAP A1 - Rudolph, Alexander A1 - Voget, Stefan A1 - Mottok, Jürgen T1 - A consistent safety case argumentation for artificial intelligence in safety related automotive systems – An Evaluation of a New Conceptual Functional Safety Approach T2 - Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France N2 - Regarding the actual automotive safety norms the use of artificial intelligence (AI) in safety critical environments like autonomous driving is not possible. This paper introduces a new conceptual safety modelling approach and a safety argumentation to certify AI algorithms in a safety related context. Therefore, a model of an AI-system is presented first. Afterwards, methods and safety argumentation are applied to the model, whereas it is limited to a specific subset of AI-systems, i.e. off-board learning deterministic neural networks in this case. Other cases are left over for future research. The result is a consistent safety analysis approach that applies state of the art safety argumentations from other domains to the automotive domain. This will enforce the adaptation of the functional safety norm ISO26262 to enable general AI methods in safety critical systems in future. Y1 - 2018 UR - https://hal.archives-ouvertes.fr/hal-02156048 ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - Das FORMUS³IC Forschungsvorhaben im Verbund – Vom Stand der Technik zu neuen Entwicklungen T2 - Embedded Software Engineering Kongress (ESE 2018), 3.-7.12.2018, Sindelfingen, Tagungsband Y1 - 2018 ER - TY - CHAP A1 - Schmid, Michael A1 - Mottok, Jürgen ED - Schoeberl, Martin ED - Hochberger, Christian ED - Uhrig, Sascha ED - Brehm, Jürgen ED - Pionteck, Thilo T1 - Asynchronous Critical Sections in Real-Time Multiprocessor Systems T2 - Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings N2 - Sharing data across multiple tasks in multiprocessor systems has intensively been studied in the past decades. Various synchronization protocols, the most well-known being the Priority Inheritance Protocol or the Priority Ceiling Protocol, have been established and analyzed so that blocking times of tasks waiting to access a shared resource can be upper bounded. To the best of our knowledge, all of these protocols share one commonality: Tasks that want to enter a critical section, that is already being executed by another task, immediately get blocked. In this paper, we introduce the Asynchronous Priority Ceiling Protocol (A-PCP), which makes use of aperiodic servers to execute the critical sections asynchronously, while the calling task can continue its work on non-critical section code. For this protocol, we provide a worst-case response time analysis of the asynchronous computations, as well as necessary and sufficient conditions for a feasibility analysis of a set of periodic tasks using the proposed synchronization model on a system that preemptively schedules the tasks under the rate-monotonic priority assignment. Y1 - 2019 U6 - https://doi.org/10.1007/978-3-030-18656-2_5 SP - 56 EP - 67 PB - Springer CY - Cham ER - TY - CHAP A1 - Renner, Sebastian A1 - Pozzobon, Enrico A1 - Mottok, Jürgen A1 - Hackenberg, Rudolf T1 - Benchmarking Software Implementations of 1st Round Candidates of the NIST LWC Project on Microcontrollers T2 - 3rd Lightweight Cryptography Workshop at NIST, Gaithersburg, USA N2 - This paper introduces a custom framework for benchmarking software implementations from the National Institute of Standards and Technology (NIST) Lightweight Cryptography (LWC) project on embedded devices. We present the design and core functions of the framework and apply it to various NIST LWC authenticated encryption with associated data (AEAD) ciphers. Altogether, we evaluate the speed of 213 submitted algorithm vari-ants on four different microcontroller units (MCUs), including 32 bit ARM and 8 bit AVR architectures. To allow a more meaningful comparison, we also conduct code size tests on all four boards and RAM utilization tests on one test platform. Y1 - 2019 UR - https://csrc.nist.gov/CSRC/media/Events/lightweight-cryptography-workshop-2019/documents/papers/benchmarking-software-implementations-lwc2019.pdf ER - TY - CHAP A1 - Osinski, Lukas A1 - Mottok, Jürgen ED - Schoeberl, Martin ED - Hochberger, Christian ED - Uhrig, Sascha ED - Brehm, Jürgen ED - Pionteck, Thilo T1 - S 3DES - Scalable Software Support for Dependable Embedded Systems T2 - Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings N2 - Scalable Software Support for Dependable Embedded Systems (S3DES) achieves fault tolerance by utilizing spatial software-based triple modular redundancy for computational and voter processes on application level. Due to the parallel execution of the replicas on distinct CPU cores it makes a step towards software-based fault tolerance against transient and permanent random hardware errors. Additionally, the compliance with real-time requirements in terms of response time is enhanced compared to similar approaches. The replicated voters, the introduced mutual voter monitoring and the optimized arithmetic encoding allow the detection and compensation of voter failures without the utilization of backward recovery. Fault injection experiments on real hardware reveal that S3DES can detect and mask all injected data and program flow errors under a single fault assumption, whereas an uncoded voting scheme yields approx. 12% silent data corruptions in a similar experiment. Y1 - 2019 U6 - https://doi.org/10.1007/978-3-030-18656-2_2 SP - 15 EP - 27 PB - Springer CY - Cham ER - TY - CHAP A1 - Hauser, Florian A1 - Reuter, Rebecca A1 - Gruber, Hans A1 - Mottok, Jürgen T1 - Research competence: Modification of a questionnaire to measure research competence at universities of applied sciences T2 - IEEE Global Engineering Education Conference (EDUCON), 17-20 April 2018, Santa Cruz de Tenerife, Spain N2 - This paper deals with the validation and modification of the German questionnaire "F-Komp". In its original version, it was intended to measure university students' research competences. In the beginning of this study, there were only a few tools available which were reliable. For the purposes of this study, they were not suitable. At the same time, there was no validated version of the F-Komp available, which made the whole validation process for further usage necessary. This questionnaire is based on a structure, which consist of different skills and knowledge and is focused on measuring research competence in general. The validation and modification of the F-Komp is therefore the aim of our contribution as well as a revised version of the questionnaire. We proceeded an explorative factor and a reliability analysis to do a general evaluation of the tool. Some modifications were done in the questionnaire to make it more suitable to the requirements of technical oriented universities of applied sciences [5]. Our revised version is slightly longer and contains several items to gather data about the participants demographics. The modified questionnaire is based on a more appropriate factor structure. This structure is more practically oriented and pays attention to ethical issues. In future cases, this questionnaire will be used in research oriented courses to measure students' progress in acquiring the knowledge and methods which are necessary to perform as a scientist in different research areas. KW - research oriented teaching KW - research competence KW - competence model KW - modification of a questionnaire Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363216 SP - 109 EP - 117 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Hauser, Florian A1 - Gold-Veerkamp, Carolin A1 - Stark, Theresa A1 - Kis, Juliane A1 - Mottok, Jürgen A1 - Abke, Jörg A1 - Meyer, Dany T1 - Towards the construction of a questionnaire for the identification of learning obstacles T2 - 2018 IEEE Global Engineering Education Conference (EDUCON 2018), 17-20 April, 2018, Santa Cruz de Tenerife, Spain N2 - This paper deals with the identification of learning ob-stacles using the questionnaire method. Therefore, two iterations were proceeded: The first one was part of a survey that was carried out at four lo-cations at universities of applied sciences. We asked students about obstructive facts in general providing items for five learning ob-stacle dimensions that were set up before; emotional/motivational, epistemological/cognitive, didactical, resource-related and meta-cognitive learning obstacle dimensions. After the general part, we asked them to answer the same question, but in relation to the – in their opinion – most difficult learning content. With this question, we aim to get indications regarding to epistemological obstacles. In a second step, we used the “Motivated Strategies for Learning Questionnaire”, which was developed by Pintrich [1] as a basis to develop a questionnaire that extracts learning obstacles. In its original version, the “Motivated Strategies for Learning Question-naire” was intended to measure students’ learning strategies, but, as the obstacle dimensions were partly derived from learning strategy classification, we chose this already validated question-naire [2]. Within this iteration, we could confirm a five-factor structure of the questionnaire that could be mapped to the five be-fore set learning obstacle dimensions. Y1 - 2018 U6 - https://doi.org/10.1109/EDUCON.2018.8363266 SP - 457 EP - 466 ER - TY - CHAP A1 - Hauser, Florian A1 - Mottok, Jürgen A1 - Reuter, Rebecca A1 - Hutzler, Ivonne A1 - Gruber, Hans T1 - Eye movement patterns in software engineering – What differs the expert from the novice? T2 - IATED, 11th International Conference of Education, Research and Innovation (ICERI 2018), 12-14 November 2018, Seville, Spain Y1 - 2018 U6 - https://doi.org/10.21125/iceri.2018.1129 ER - TY - RPRT A1 - Hauser, Florian A1 - Mottok, Jürgen ED - Baier, Wolfgang T1 - Eye movement patterns im Software Engineering T2 - Forschung 2018 / Ostbayerische Technische Hochschule Regensburg Y1 - 2018 UR - https://doi.org/10.35096/othr/pub-1382 SP - 48 EP - 49 ER - TY - CHAP A1 - Reuter, Rebecca A1 - Knietzsch, Marco A1 - Hauser, Florian A1 - Mottok, Jürgen T1 - Supporting Abstraction Skills Using Augmented Reality? T2 - ITiCSE '19, Proceedings of the 2019 ACM Conference on Innovation and Technology in Computer Science Education, July 2019, Aberdeen Scotland UK N2 - We investigated the potential of augmented reality (AR) to enable visualization of abstract concepts and present the first iteration of a teaching experiment that evaluates the use of AR as support for abstraction skills. Students were confronted with the task to present and explain information to different groups of stakeholders at the example of a coffee machine. Results show that students find it helpful to have a visual app-prototype and especially one that can be disassembled in different levels. The main goal was to sensitize students for the need to think about and to abstract information for certain roles and perspectives. Y1 - 2019 U6 - https://doi.org/10.1145/3304221.3325562 ER - TY - GEN A1 - Gegenfurtner, Andreas A1 - Boucheix, Jean-Michel A1 - Gruber, Hans A1 - Hauser, Florian A1 - Lehtinen, Erno A1 - Lowe, Richard K. T1 - Der Gaze Relational Index als Indikator visueller Expertise T2 - 51. Kongress der Deutschen Gesellschaft für Psychologie : 15. bis 20. September 2018, Goethe-Universität Frankfurt am Main, Campus Westend N2 - Eye tracking is a powerful technique that helps reveal how people process visual information. This paper discusses a novel metric for indicating expertise in visual information processing. Named the Gaze Relational Index (GRI), this metric is defined as the ratio of mean fixation duration to fixation count. Data from two eye-tracking studies of professional vision and visual expertise in using 3D dynamic medical visualizations are presented as cases to illustrate the suitability and additional benefits of the GRI. Calculated values of the GRI were higher for novices than for experts, and higher in non-representative, semi-familiar / unfamiliar task conditions than in domain-representative familiar tasks. These differences in GRI suggest that, compared to novices, experts engaged in more knowledge-driven, top-down processing that was characterized by quick, exploratory visual search. We discuss future research aiming to replicate the GRI in professional domains with complex visual stimuli and to identify the moderating role of cognitive ability on GRI estimates. Y1 - 2020 SN - 2573-2773 SP - 402 ER - TY - CHAP A1 - Hauser, Florian A1 - Gegenfurtner, Andreas A1 - Hutzler, Ivonne A1 - Reuter, Rebecca A1 - Mottok, Jürgen T1 - Eye movement patterns in source code review T2 - EARLI SIG 17 and 25 Biennial Conference 2018, Cambridge, United Kingdom N2 - This study is based on the work of Uwano, Nakamura, Monden and Matsumoto (2006) who tried to identify programmers’ eye movements in source code reviews by using eye tracking technology. The researchers were able to identify certain eye movement patterns but due to the technical limitations of earlier eye tracking systems and a small sample they could not find a valid proof for their existence. Now, twelve years later, the eye tracking technology has made significant improvements and is able to capture programmers’ reading behavior in an unobtrusive and precise way. Now the goal is to verify the described patterns by using eye tracking data from expert and novice programmers. In the experiment they have to detect errors in six different codes and take part in a retrospective interview. At the moment, data collections are ongoing. At the time of the conference, we will present the results of our analyses. Y1 - 2018 ER - TY - BOOK A1 - Weilkiens, Tim A1 - Huwaldt, Alexander A1 - Mottok, Jürgen A1 - Roth, Stephan A1 - Willert, Andreas T1 - Modellbasierte Softwareentwicklung für eingebettete Systeme verstehen und anwenden N2 - Die Beherrschung von Komplexität ist eine der größten Engineering-Herausforderungen des 21. Jahrhunderts. Themen wie das „Internet der Dinge“ (IoT) und „Industrie 4.0“ beschleunigen diesen Trend. Die modellgetriebene Entwicklung leistet einen entscheidenden Beitrag, um diesen Herausforderungen erfolgreich begegnen zu können. Die Autoren geben einen fundierten Einstieg und praxisorientierten Überblick über die Modellierung von Software für eingebettete Systeme von den Anforderungen über die Architektur bis zum Design, der Codegenerierung und dem Testen. Für jede Phase werden Paradigmen, Methoden, Techniken und Werkzeuge beschrieben und ihre praktische Anwendung in den Vordergrund gestellt. Darüber hinaus wird auf die Integration von Werkzeugen, funktionale Sicherheit und Metamodellierung eingegangen sowie die Einführung eines modellbasierten Ansatzes in einer Organisation und die Notwendigkeit zum lebenslangen Lernen erläutert. Der Leser erfährt in diesem Buch, wie ein modellbasiertes Vorgehen nutzbringend in der Praxis für die Softwareentwicklung eingesetzt wird. Das Vorgehen wird unabhängig von Modellierungswerkzeugen vorgestellt. Zahlreiche Beispiele – exemplarisch auch auf Basis konkreter Werkzeuge – helfen bei der praktischen Umsetzung. Y1 - 2018 SN - 978-3-86490-524-7 PB - dpunkt.Verlag CY - Heidelberg ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Schmid, Michael A1 - Mottok, Jürgen T1 - PyFI – Fault Injection Plattform for Real Hardware T2 - 31th International Conference on Architecture of Computing Systems, ARCS Workshop 9-12 April 2018, Braunschweig, Germany N2 - Today, due to the rapidly evolving technology within the automotive industry, the automation level of cars is continuously increasing. As a consequence, the software code base implementing the automated driving functionality is growing in both, complexity and size. Simultaneously, the semiconductor industry continues with structure and voltage downscaling due to diminishing design margins and stringent power constraints. This trend leads to highly integrated hardware on the one hand, whilst provoking an increase in sensitivity against external causes for hardware faults, e.g., radiation effects or electromagnetic interference. Among the available dependability assessment techniques, fault injection (FI) is widely adopted and ISO 26262 strongly recommends applying it to validate, that functional and technical safety mechanisms are implemented correctly and effectively. We present PyFI (Python backend for Fault Injection), a fault injection backend for the Infineon Aurix TriCore which utilizes an iSystem On-chip Analyzer to inject faults into the application data or instructions that are visible at the assembly level. PyFI allows the injection of bit flips and stuck-at faults in memory and register cells of the hardware which trigger our error symptoms on application level. Furthermore, it implements fault collapsing algorithms to reduce the number of faults and the duration for single experiments by gathering statistics about the static and dynamic application execution. Y1 - 2018 UR - https://ieeexplore.ieee.org/document/8385427 SP - 1 EP - 7 ER - TY - CHAP A1 - Osinski, Lukas A1 - Langer, Tobias A1 - Mader, Ralph A1 - Mottok, Jürgen T1 - Challenges and Opportunities with Embedded Multicore Platforms BT - Spotlight on Real-Time and Dependability Concepts T2 - 9th European Congress Embedded Real Time Software and Systems (ERTS 2018), January 31st to Febraury 2nd 2018, Toulouse, France Y1 - 2018 UR - https://hal.archives-ouvertes.fr/hal-02156232/ ER - TY - CHAP A1 - Langer, Tobias A1 - Osinski, Lukas A1 - Schmid, Michael A1 - Mottok, Jürgen T1 - Work-in-Progress: Real-Time Scheduling of Parallel Applications with Gang Scheduling T2 - International Conference on Architecture of Computing Systems (ARCS) Workshop, 9-12 April 2018, Braunschweig, Germany N2 - Future embedded systems demand increasingly more computation performance, which can only be provided by exploiting parallelism in real-time applications. Due to scheduling and scalability issues, parallelism still is an open issue especially in hard real-time systems. In this work-in-progress paper, we describe and discuss a hierarchical gang-scheduling based approach to address the scalability issue. We use gang scheduling to schedule tasks consisting of multiple kernel level threads. The execution budget provided by the kernel level threads is used for scheduling of user level threads using a lightweight threading library running in user space. Further, the first steps towards an implementation in the realtime operating system kernel Erika OS are described and possible benefits and risks of this approach are shown. Y1 - 2018 ER -