<?xml version="1.0" encoding="utf-8"?>
<export-example>
  <doc>
    <id>1123</id>
    <completedYear/>
    <publishedYear>2011</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>315</pageFirst>
    <pageLast>319</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-05</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Safe software processing by concurrent execution in a real-time operating system</title>
    <abstract language="eng">The requirements for safety-related software systems increases rapidly. To detect arbitrary hardware faults, there are applicable coding mechanism, that add redundancy to the software. In this way it is possible to replace conventional multi-channel hardware and so reduce costs. Arithmetic codes are one possibility of coded processing and are used in this approach. A further approach to increase fault tolerance is the multiple execution of certain critical parts of software. This kind of time redundancy is easily realized by the parallel processing in an operating system. Faults in the program flow can be monitored. No special compilers, that insert additional generated code into the existing program, are required. The usage of multi-core processors would further increase the performance of such multi-channel software systems. In this paper we present the approach of program flow monitoring combined with coded processing, which is encapsulated in a library of coded data types. The program flow monitoring is indirectly realized by means of an operating system.</abstract>
    <parentTitle language="eng">16th International Conference on Applied Electronics (AE 2011), 2011, Pilsen, Czech Republic</parentTitle>
    <enrichment key="opus.source">publish</enrichment>
    <author>Peter Raab</author>
    <author>Stefan Krämer</author>
    <author>Jürgen Mottok</author>
    <author>Hans Meier</author>
    <author>Stanislav Racek</author>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Labor Industrielle Elektronik</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1147</id>
    <completedYear/>
    <publishedYear>2014</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>591</pageFirst>
    <pageLast>598</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Comparison of Enhanced Markov Models and Discrete Event Simulation</title>
    <abstract language="eng">In this paper we present simulation and model based approaches for evaluating and validating the temporal and safety relevant properties of software intensive safety-critical real-time embedded systems. A high level reliability model of a safe task execution is described by a continuous-time Markov process, enhanced by the modeling of execution times. It is shown that the behavior - regarding real-time and safety metrics - of this theoretical model can be transferred into an abstract system timing model, which then can be analyzed by a discrete event simulation approach. The verification of the discrete event simulation by Markov models offers the possibility of a holistic approach for reliability analysis combined with schedulability analysis of complex safety-critical multicore real-time systems by the discrete event simulation.</abstract>
    <parentTitle language="eng">17th Euromicro Conference on Digital System Design (DSD), 27-29 August 2014, Verona, Italy</parentTitle>
    <identifier type="doi">10.1109/DSD.2014.42</identifier>
    <enrichment key="opus.source">publish</enrichment>
    <author>Stefan Krämer</author>
    <author>Peter Raab</author>
    <author>Jürgen Mottok</author>
    <author>Stanislav Racek</author>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1158</id>
    <completedYear/>
    <publishedYear>2014</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>591</pageFirst>
    <pageLast>598</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Comparison of Enhanced Markov Models and Discrete Event Simulation – for evaluation of probabilistic Faults in safety-critical real-time task sets</title>
    <abstract language="eng">In this paper we present simulation and model based approaches for evaluating and validating the temporal and safety relevant properties of software intensive safety-critical real-time embedded systems. A high level reliability model of a safe task execution is described by a continuous-time Markov process, enhanced by the modeling of execution times. It is shown that the behavior - regarding real-time and safety metrics - of this theoretical model can be transferred into an abstract system timing model, which then can be analyzed by a discrete event simulation approach. The verification of the discrete event simulation by Markov models offers the possibility of a holistic approach for reliability analysis combined with schedulability analysis of complex safety-critical multicore real-time systems by the discrete event simulation.</abstract>
    <parentTitle language="eng">Proceedings of EUROMICRO DSD 2014 - 17th Euromicro Conference on Digital System Design</parentTitle>
    <identifier type="doi">10.1109/DSD.2014.42</identifier>
    <enrichment key="opus.source">publish</enrichment>
    <author>Stefan Krämer</author>
    <author>Peter Raab</author>
    <author>Jürgen Mottok</author>
    <author>Stanislav Racek</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Model</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Stochastic simulation</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>reliability analysis</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>safe software processing</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>real-time operating system</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>multicore scheduling</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>discrete event simulation</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>fault injection</value>
    </subject>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1195</id>
    <completedYear/>
    <publishedYear>2013</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>243</pageFirst>
    <pageLast>249</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Data Flow Analysis of Software Executed by Unreliable Hardware</title>
    <abstract language="eng">The data flow is a crucial part of software execution in recent applications. It depends on the concrete implementation of the realized algorithm and it influences the correctness of a result in case of hardware faults during the calculation. In logical circuits, like arithmetic operations in a processor system, arbitrary faults become a more tremendous aspect in future. With modern manufacturing processes, the probability of such faults will increase and the result of a software's data flow will be more vulnerable. This paper shows a principle evaluation method for the reliability of a software's data flow with arbitrary soft errors also with the concept of fault compensation. This evaluation is discussed by means of a simple example based on an addition.</abstract>
    <parentTitle language="eng">16th Euromicro Conference on Digital System Design, Los Alamitos, CA, USA</parentTitle>
    <identifier type="doi">10.1109/DSD.2013.35</identifier>
    <enrichment key="opus.source">publish</enrichment>
    <author>Peter Raab</author>
    <author>Stanislav Racek</author>
    <author>Stefan Krämer</author>
    <author>Jürgen Mottok</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>data flow</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>error probability</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>fault compensation</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>reliability analysis</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>software-implemented-hardwarefault-tolerance (SIHFT)</value>
    </subject>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1209</id>
    <completedYear/>
    <publishedYear>2012</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>151</pageFirst>
    <pageLast>156</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Reliability analysis of real-time scheduling by means of stochastic simulation</title>
    <abstract language="eng">We present a simulation-based approach to reliability analysis combined with a schedulability analysis of software intensive embedded real-time systems. In such a system not only does the software execution have to be hardened against soft errors, e.g., by means of coded processing or diverse execution, but also the real-time requirements have still to be met in the presence of such error to guarantee a safe operation of the system. For that reason, the influence regarding the real-time characteristics of a given sporadic error with a certain error rate is analyzed by means of a Monte Carlo simulation. Different safety design patterns are introduced and compared. Furthermore, the impact on the schedulability of an embedded system is discussed.</abstract>
    <parentTitle language="eng">2012 International Conference on Applied Electronics (AE 2012), Pilsen, Czech Republic, 5 - 7 September 2012</parentTitle>
    <enrichment key="opus.source">publish</enrichment>
    <author>Stefan Krämer</author>
    <author>Peter Raab</author>
    <author>Jürgen Mottok</author>
    <author>Stanislav Racek</author>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1211</id>
    <completedYear/>
    <publishedYear>2012</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>84</pageFirst>
    <pageLast>89</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Reliability of Task Execution during Safe Software Processing</title>
    <abstract language="eng">This paper presents the reliability evaluation of task execution during safe software processing. The standard method of duplication in a safety-critical application can also be applied for tasks in a software system. But in addition to this, there is also the possibility for coded task processing to increase the reliability and availability of software. The presented analysis covers the reliability analysis of a single, a duplicated and a coded task by the technique of continuous time Markov processes. Markov processes are often used for the reliability evaluation of safety-critical systems. We introduce a method to describe the execution time of tasks by means of enhanced Markov models and their solution by numerical methods.</abstract>
    <parentTitle language="eng">15th Euromicro Conference on Digital System Design, Cesme, Turkey</parentTitle>
    <identifier type="doi">10.1109/DSD.2012.110</identifier>
    <enrichment key="opus.source">publish</enrichment>
    <author>Peter Raab</author>
    <author>Stanislav Racek</author>
    <author>Stefan Krämer</author>
    <author>Jürgen Mottok</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>reliability analysis</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>continuous-time Markov process</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>error probability</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Erlang-distribution</value>
    </subject>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>1239</id>
    <completedYear/>
    <publishedYear>2015</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>88</pageFirst>
    <pageLast>93</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-06</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Proportionate fair based multicore scheduling for fault tolerant multicore real-time systems</title>
    <abstract language="eng">In this paper we present a scheduling approach for safety critical, fault tolerant, multicore real-time embedded systems. For this kind of systems, not only the correctness of a computed result but also the strict adherence to timing requirements of computation is essential to avoid any kind of damage. To react to unpredictable, arbitrary hardware faults suitable error detection mechanisms have to be applied. The caused error itself and the detection and correction have great impact on the system's timing behavior. To still keep the real-time requirements, the used scheduling algorithm has to ensure maximum flexibility to disturbances of the timing. The group of Proportionate Fair (Pfairness) multicore scheduling algorithms has been proven to create an optimal schedule in polynomial time. The contribution of this paper is a Pfair-based algorithm that uses tight coupling between the error detection mechanisms and the scheduler of the real-time operating system to establish a loop-back connection.</abstract>
    <parentTitle language="eng">International Conference on Electrical and Information Technologies (ICEIT), 25-27 March 2015, Marakesch, Morocco</parentTitle>
    <identifier type="doi">10.1109/EITech.2015.7162952</identifier>
    <enrichment key="opus.source">publish</enrichment>
    <author>Stefan Krämer</author>
    <author>Jürgen Mottok</author>
    <author>Stanislav Racek</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Multicore processing</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Time factors</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Safety</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Schedules</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Scheduling algorithms</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Real-time systems</value>
    </subject>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
</export-example>
