<?xml version="1.0" encoding="utf-8"?>
<export-example>
  <doc>
    <id>1009</id>
    <completedYear/>
    <publishedYear>2020</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>495</pageFirst>
    <pageLast>509</pageLast>
    <pageNumber/>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName>Springer</publisherName>
    <publisherPlace>Cham</publisherPlace>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>2021-02-03</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">A Hardware in the Loop Benchmark Suite to Evaluate NIST LWC Ciphers on Microcontrollers</title>
    <abstract language="eng">The National Institute of Standards and Technology (NIST) started the standardization process for lightweight cryptography algorithms in 2018. By the end of the first round, 32 submissions have been selected as 2nd round candidates. NIST allowed designers of 2nd round submissions to provide small updates on both their specifications and implementation packages. In this work, we introduce a benchmarking framework for evaluating the performance of NIST Lightweight Cryptography (LWC) candidates on embedded platforms. We show the features and application of the framework and explain its design rationale. Moreover, we provide information on how we aim to present up-to-date performance figures throughout the NIST LWC competition. In this paper, we present an excerpt of our software benchmarking results regarding speed and memory requirements of selected ciphers. All up-to-date results, including benchmarking different test cases for multiple variants of each 2nd round algorithm on five different microcontrollers, are periodically published to a public website. While initially only the reference implementations were available, the ability of automatically testing the performance of the candidate algorithms on multiple platforms becomes especially relevant as more optimized implementations are developed. Finally, we show how the framework can be extended in different directions: support for more target platforms can be easily added, different kinds of algorithms can be tested, and other test metrics can be acquired. The focus of this paper should rather lay on the framework design and testing methodology than on the current results, especially for reference code.</abstract>
    <parentTitle language="eng">Information and Communications Security: 22nd International Conference, ICICS 2020, Copenhagen, Denmark, August 24-26, 2020, Proceedings</parentTitle>
    <identifier type="doi">10.1007/978-3-030-61078-4_28</identifier>
    <enrichment key="BegutachtungStatus">peer-reviewed</enrichment>
    <enrichment key="AmountAPC">Lecture Notes in Computer Science ; 12282</enrichment>
    <licence>Keine Lizenz - Es gilt das deutsche Urheberrecht: § 53 UrhG</licence>
    <author>Sebastian Renner</author>
    <author>Enrico Pozzobon</author>
    <author>Jürgen Mottok</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Lightweight cryptography</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Benchmarking</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Embedded systems</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>RISC-V</value>
    </subject>
    <collection role="ddc" number="005">Computerprogrammierung, Programme, Daten</collection>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16315">Information und Kommunikation</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>3045</id>
    <completedYear/>
    <publishedYear>2021</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>279</pageFirst>
    <pageLast>295</pageLast>
    <pageNumber/>
    <edition/>
    <issue>4</issue>
    <volume>31</volume>
    <type>article</type>
    <publisherName/>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">Automated Reverse Engineering of CAN Protocols</title>
    <abstract language="eng">Car manufacturers define proprietary protocols to be used inside their vehicular networks, which are kept an industrial secret, therefore impeding independent researchers from extracting information from these networks. This article describes a statistical and a neural network approach that allows reverse engineering proprietary controller area network (CAN)-protocols assuming they were designed using the data base CAN (DBC) file format. The proposed algorithms are tested with CAN traces taken from a real car. We show that our approaches can correctly reverse engineer CAN messages in an automated manner.</abstract>
    <parentTitle language="eng">Neural Network World</parentTitle>
    <identifier type="doi">10.14311/NNW.2021.31.015</identifier>
    <identifier type="issn">1210-0552</identifier>
    <enrichment key="opus.import.date">2022-03-07T14:48:51+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">importuser</enrichment>
    <enrichment key="BegutachtungStatus">peer-reviewed</enrichment>
    <licence>Keine Lizenz - Es gilt das deutsche Urheberrecht: § 53 UrhG</licence>
    <author>Nils Weiss</author>
    <author>Enrico Pozzobon</author>
    <author>Jürgen Mottok</author>
    <author>Václav Matoušek</author>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16315">Information und Kommunikation</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>5527</id>
    <completedYear/>
    <publishedYear>2022</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst/>
    <pageLast/>
    <pageNumber>4</pageNumber>
    <edition/>
    <issue/>
    <volume/>
    <type>conferenceobject</type>
    <publisherName>IEEE</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">An optimized Bitsliced Masked Adder for ARM Thumb-2 Controllers</title>
    <abstract language="eng">The modular addition is used as a non-linear operation in ARX ciphers because it achieves the requirement of introducing non-linearity in a cryptographic primitive while only taking one clock cycle to execute on most modern architectures. This makes ARX ciphers especially fast in software implementations, but comes at the cost of making it harder to protect against side-channel information leakages using Boolean masking: the best known 2-shares masked adder for ARM Thumb micro-controllers takes 83 instructions to add two 32-bit numbers together. Our approach is to operate in bitsliced mode, performing 32 additions in parallel on a 32-bit microcontroller. We show that, even after taking into account the cost of bitslicing before and after the encryption, it is possible to achieve a higher throughput on the tested ciphers (CRAX and ChaCha20) when operating in bitsliced mode. Furthermore, we prove that no first-order information leakage is happening in either simulated power traces and power traces acquired from real hardware, after sufficient countermeasures are put into place to guard against pipeline leakages.</abstract>
    <parentTitle language="eng">27th International Conference on Applied Electronics (AE): Sep 6, 2022 - Sep 7, 2022, Pilsen, Czech Republic</parentTitle>
    <identifier type="doi">10.1109/AE54730.2022.9919884</identifier>
    <enrichment key="BegutachtungStatus">peer-reviewed</enrichment>
    <licence>Keine Lizenz - Es gilt das deutsche Urheberrecht: § 53 UrhG</licence>
    <author>Enrico Pozzobon</author>
    <author>Sebastian Renner</author>
    <author>Jürgen Mottok</author>
    <author>Václav Matoušek</author>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>ARM Thumb</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>bitsliced</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>side-channel</value>
    </subject>
    <subject>
      <language>eng</language>
      <type>uncontrolled</type>
      <value>Boolean masking</value>
    </subject>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
  <doc>
    <id>6745</id>
    <completedYear/>
    <publishedYear>2023</publishedYear>
    <thesisYearAccepted/>
    <language>eng</language>
    <pageFirst>357</pageFirst>
    <pageLast>374</pageLast>
    <pageNumber/>
    <edition/>
    <issue>5</issue>
    <volume>33</volume>
    <type>article</type>
    <publisherName>Czech Technical University in Prague</publisherName>
    <publisherPlace/>
    <creatingCorporation/>
    <contributingCorporation/>
    <belongsToBibliography>0</belongsToBibliography>
    <completedDate>--</completedDate>
    <publishedDate>--</publishedDate>
    <thesisDateAccepted>--</thesisDateAccepted>
    <title language="eng">An evolutionary fault injection settings search algorithm for attacks on safe and secure embedded systems</title>
    <parentTitle language="eng">Neural Network World (NNW)</parentTitle>
    <identifier type="doi">10.14311/NNW.2023.33.020</identifier>
    <enrichment key="opus.import.date">2023-11-20T07:29:48+00:00</enrichment>
    <enrichment key="opus.source">sword</enrichment>
    <enrichment key="opus.import.user">importuser</enrichment>
    <enrichment key="BegutachtungStatus">peer-reviewed</enrichment>
    <licence>Keine Lizenz - Es gilt das deutsche Urheberrecht: § 53 UrhG</licence>
    <author>Enrico Pozzobon</author>
    <author>Nils Weiß</author>
    <author>Jürgen Mottok</author>
    <author>Václav Matoušek</author>
    <collection role="institutes" number="FakEI">Fakultät Elektro- und Informationstechnik</collection>
    <collection role="othforschungsschwerpunkt" number="16311">Digitalisierung</collection>
    <collection role="institutes" number="">Laboratory for Safe and Secure Systems (LAS3)</collection>
  </doc>
</export-example>
