@article{RaabMottokMeier, author = {Raab, Peter and Mottok, J{\"u}rgen and Meier, Hans}, title = {OSEK-RTOS f{\"u}r Jedermann (Teil 2)}, series = {Embedded Software Engineering Report}, volume = {53}, journal = {Embedded Software Engineering Report}, pages = {10 -- 12}, language = {de} } @article{RaabMottokMeier, author = {Raab, Peter and Mottok, J{\"u}rgen and Meier, Hans}, title = {OSEK-RTOS f{\"u}r Jedermann (Teil 1)}, series = {Embedded Software Engineering Report}, volume = {53}, journal = {Embedded Software Engineering Report}, number = {September}, pages = {14 -- 15}, language = {de} } @inproceedings{RaabKraemerMottok, author = {Raab, Peter and Kr{\"a}mer, Stefan and Mottok, J{\"u}rgen}, title = {Cyclic codes and error detection during data processing in embedded software systems}, series = {Proceedings of the 4rd Embedded Software Engineering Congress (ESE), 5.-9. Dezember 2011, Sindelfingen}, booktitle = {Proceedings of the 4rd Embedded Software Engineering Congress (ESE), 5.-9. Dezember 2011, Sindelfingen}, pages = {577 -- 590}, language = {en} } @inproceedings{RaabKraemerMottoketal., author = {Raab, Peter and Kr{\"a}mer, Stefan and Mottok, J{\"u}rgen and Meier, Hans and Racek, Stanislav}, title = {Safe software processing by concurrent execution in a real-time operating system}, series = {16th International Conference on Applied Electronics (AE 2011), 2011, Pilsen, Czech Republic}, booktitle = {16th International Conference on Applied Electronics (AE 2011), 2011, Pilsen, Czech Republic}, pages = {315 -- 319}, abstract = {The requirements for safety-related software systems increases rapidly. To detect arbitrary hardware faults, there are applicable coding mechanism, that add redundancy to the software. In this way it is possible to replace conventional multi-channel hardware and so reduce costs. Arithmetic codes are one possibility of coded processing and are used in this approach. A further approach to increase fault tolerance is the multiple execution of certain critical parts of software. This kind of time redundancy is easily realized by the parallel processing in an operating system. Faults in the program flow can be monitored. No special compilers, that insert additional generated code into the existing program, are required. The usage of multi-core processors would further increase the performance of such multi-channel software systems. In this paper we present the approach of program flow monitoring combined with coded processing, which is encapsulated in a library of coded data types. The program flow monitoring is indirectly realized by means of an operating system.}, language = {en} } @article{RaabKraemerMottoketal., author = {Raab, Peter and Kr{\"a}mer, Stefan and Mottok, J{\"u}rgen and Vavricka, Vlastimil}, title = {Isomorphism between Linear Codes and Arithmetic Codes for Safe Data Processing in Embedded Software Systems}, series = {Computing and Informatics (CAI)}, volume = {33}, journal = {Computing and Informatics (CAI)}, pages = {721 -- 734}, abstract = {We present a transformation rule to convert linear codes into arithmetic codes. Linear codes are usually used for error detection and correction in broadcast and storage systems. In contrast, arithmetic codes are very suitable for protection of software processing in computer systems. This paper shows how to transform linear codes protecting the data stored in a computer system into arithmetic codes safeguarding the operations built on this data. Combination of the advantages of both coding mechanisms will increase the error detection capability in safety critical applications for embedded systems by detection and correction of arbitrary hardware faults.}, language = {en} } @inproceedings{KraemerRaabMottoketal., author = {Kr{\"a}mer, Stefan and Raab, Peter and Mottok, J{\"u}rgen and Racek, Stanislav}, title = {Comparison of Enhanced Markov Models and Discrete Event Simulation}, series = {17th Euromicro Conference on Digital System Design (DSD), 27-29 August 2014, Verona, Italy}, booktitle = {17th Euromicro Conference on Digital System Design (DSD), 27-29 August 2014, Verona, Italy}, doi = {10.1109/DSD.2014.42}, pages = {591 -- 598}, abstract = {In this paper we present simulation and model based approaches for evaluating and validating the temporal and safety relevant properties of software intensive safety-critical real-time embedded systems. A high level reliability model of a safe task execution is described by a continuous-time Markov process, enhanced by the modeling of execution times. It is shown that the behavior - regarding real-time and safety metrics - of this theoretical model can be transferred into an abstract system timing model, which then can be analyzed by a discrete event simulation approach. The verification of the discrete event simulation by Markov models offers the possibility of a holistic approach for reliability analysis combined with schedulability analysis of complex safety-critical multicore real-time systems by the discrete event simulation.}, language = {en} } @inproceedings{KraemerRaabMottoketal., author = {Kr{\"a}mer, Stefan and Raab, Peter and Mottok, J{\"u}rgen and Racek, Stanislav}, title = {Comparison of Enhanced Markov Models and Discrete Event Simulation - for evaluation of probabilistic Faults in safety-critical real-time task sets}, series = {Proceedings of EUROMICRO DSD 2014 - 17th Euromicro Conference on Digital System Design}, booktitle = {Proceedings of EUROMICRO DSD 2014 - 17th Euromicro Conference on Digital System Design}, doi = {10.1109/DSD.2014.42}, pages = {591 -- 598}, abstract = {In this paper we present simulation and model based approaches for evaluating and validating the temporal and safety relevant properties of software intensive safety-critical real-time embedded systems. A high level reliability model of a safe task execution is described by a continuous-time Markov process, enhanced by the modeling of execution times. It is shown that the behavior - regarding real-time and safety metrics - of this theoretical model can be transferred into an abstract system timing model, which then can be analyzed by a discrete event simulation approach. The verification of the discrete event simulation by Markov models offers the possibility of a holistic approach for reliability analysis combined with schedulability analysis of complex safety-critical multicore real-time systems by the discrete event simulation.}, language = {en} } @inproceedings{RaabMottok, author = {Raab, Peter and Mottok, J{\"u}rgen}, title = {Modellbasierte Zuverl{\"a}ssigkeitsanalysen von arithmetischen Operationen in einem Prozessorsystem}, series = {Proceedings of safe.tech 2014, 20. und 21. Mai 2014, M{\"u}nchen}, booktitle = {Proceedings of safe.tech 2014, 20. und 21. Mai 2014, M{\"u}nchen}, language = {de} } @inproceedings{RaabKraemerMottok, author = {Raab, Peter and Kr{\"a}mer, Stefan and Mottok, J{\"u}rgen}, title = {Error Model and the Reliability of Arithmetic Operations}, series = {2013 IEEE EUROCON - International Conference on Computer as a Tool, Zagreb, Croatia, July 1-4, 2013}, booktitle = {2013 IEEE EUROCON - International Conference on Computer as a Tool, Zagreb, Croatia, July 1-4, 2013}, doi = {10.1109/EUROCON.2013.6625047}, pages = {630 -- 637}, abstract = {Error detecting and correcting codes are widely used in data transmission, storage systems and also for data processing. In logical circuits like arithmetic operations, arbitrary faults can cause errors in the result. However in safety critical applications, it is important to avoid those errors which would lead to system failures. Several approaches are known to protect the result of operations during software processing. In the same way like transmission systems, coded processing uses codes for fault detection. But in contrast to transmission systems, there is no adequate channel model available which makes it possible to evaluate the residue error probability of an arithmetic operation in an analytical way. This paper tries to close the gap of arithmetic error models by the development of a model for an ordinary addition in a computer system. Thus, the reliability of an addition's result can be analytically evaluated.}, language = {en} } @inproceedings{RaabRacekKraemeretal., author = {Raab, Peter and Racek, Stanislav and Kr{\"a}mer, Stefan and Mottok, J{\"u}rgen}, title = {Data Flow Analysis of Software Executed by Unreliable Hardware}, series = {16th Euromicro Conference on Digital System Design, Los Alamitos, CA, USA}, booktitle = {16th Euromicro Conference on Digital System Design, Los Alamitos, CA, USA}, doi = {10.1109/DSD.2013.35}, pages = {243 -- 249}, abstract = {The data flow is a crucial part of software execution in recent applications. It depends on the concrete implementation of the realized algorithm and it influences the correctness of a result in case of hardware faults during the calculation. In logical circuits, like arithmetic operations in a processor system, arbitrary faults become a more tremendous aspect in future. With modern manufacturing processes, the probability of such faults will increase and the result of a software's data flow will be more vulnerable. This paper shows a principle evaluation method for the reliability of a software's data flow with arbitrary soft errors also with the concept of fault compensation. This evaluation is discussed by means of a simple example based on an addition.}, language = {en} } @inproceedings{KraemerRaabMottok, author = {Kr{\"a}mer, Stefan and Raab, Peter and Mottok, J{\"u}rgen}, title = {Simulationsbasierte Reliability-Analyse - Einfl{\"u}sse von zuf{\"a}lligen Fehlern auf das Echtzeit-Scheduling}, series = {Tagungsband 5th Embedded Software Engineering Kongress, 3. bis 7. Dezember 2012, Sindelfingen}, booktitle = {Tagungsband 5th Embedded Software Engineering Kongress, 3. bis 7. Dezember 2012, Sindelfingen}, pages = {613 -- 622}, language = {de} }