@inproceedings{LaloDeubzerSchmidhuberetal., author = {Lalo, Erjola and Deubzer, Michael and Schmidhuber, Stefan and Oklapi, Erna and Mottok, J{\"u}rgen}, title = {Task Priority Optimization in Real-Time Multi-Core Embedded Systems}, series = {4. Landshuter Symposium Mikrosystemtechnik, Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, booktitle = {4. Landshuter Symposium Mikrosystemtechnik, Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, address = {Landshut}, isbn = {978-3-9812696-5-9}, pages = {96 -- 109}, abstract = {The shift from single-core to multi-core processors in real-time embedded systems leads to communication based effects on timing such as inter-core communication delays and blocking times. Moreover, the complexity of the scheduling problem increases when multi-core processors are used. In priority-based-scheduling, a fixed priority assignment is used in order to enable predictable behavior of the system. Predictability means that the system has to be analyzable which allows the detection of problems coming from scheduling decisions. For fixed priority scheduling in multi-core real-time embedded systems, a proper task priority assignment has to be done in a way that the system has minimal effects on timing. In this paper, we present an approach for finding near-optimal solutions for task priority assignment and the preemption/cooperation problem. A genetic algorithm is hereby used to create priority assignment solutions. A timing simulator is used for evaluation of each solution regarding real-time properties, memory consumption and communication overhead. In a case study we demonstrate that the proposed approach performs better than well known and single-core optimal heuristics for relatively complex systems.}, language = {de} } @inproceedings{LaloSchmidhuberDeubzeretal., author = {Lalo, Erjola and Schmidhuber, Stefan and Deubzer, Michael and Mottok, J{\"u}rgen}, title = {Extended Task Priority and Preemptability Optimization in Real-Time Multi-Core Embedded Systems}, series = {4th Applied Research Conference, 5th July 2014, Ingolstadt}, booktitle = {4th Applied Research Conference, 5th July 2014, Ingolstadt}, address = {Ingolstadt}, isbn = {978-3-8440-2875-1}, pages = {90 -- 95}, language = {en} } @inproceedings{OklapiDeubzerSchmidhuberetal., author = {Oklapi, Erna and Deubzer, Michael and Schmidhuber, Stefan and Lalo, Erjola and Mottok, J{\"u}rgen}, title = {Optimization of Real-Time Multicore Systems Reached by a Genetic Algorithm Approach for Runnable Sequencing}, series = {2014 International Conference on Applied Electronics, Pilsen, Czech Republic}, booktitle = {2014 International Conference on Applied Electronics, Pilsen, Czech Republic}, doi = {10.1109/AE.2014.7011709}, pages = {233 -- 238}, abstract = {The deployment of complex real-time systems with everyday increasing demands and possibilities, is a challenging task for engineers when performance and efficiency have to be maximized while cost have to be minimized at the same time. For already designed systems it became necessary to perform different modifications in order to find optimal software architecture configuration by respecting all timing constraints which are essential when speaking of real-time systems. In this work, we present a model-based approach of optimizing the execution sequence of runnables within tasks in order to reduce the system's reaction times by improving the overall signal flow duration. Hereby, a genetic optimization algorithm is used to create and evaluate multiple solutions for the runnable sequencing problem. We conclude by demonstration the efficiency of the presented approach with experimental results.}, language = {en} } @inproceedings{LaloWeberSaileretal., author = {Lalo, Erjola and Weber, Raphael and Sailer, Andreas and Mottok, J{\"u}rgen and Siemers, Christian}, title = {On Solving Task Allocation and Schedule Generation for Time-Triggered LET Systems using Constraint Programming}, series = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, booktitle = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, pages = {1 -- 8}, abstract = {The amount of safety-critical embedded systems in automotive development is heavily growing. Ensuring their reliability not only increases the complexity of functions but also requires determinism at design and execution time, which is considerably challenging to fulfill and verify for multi-core processors. The Logical Execution Time (LET) is recently recognized in automotive industry as an approach for ensuring deterministic functional behavior. However, to decrease the manual design effort and time for deploying such complex systems to multi-core platforms and for ensuring their strict timing and safety requirements, automatic solutions are needed. This work presents a solution for allocating tasks to multi-core processors and generating a time-triggered schedule for embedded systems considering safety, timing, and LET semantics. The approach we propose solves both challenges by defining them as a Constraint Satisfaction Problem (CSP). To examine our CSP formulation, we use MiniZinc, which is a solver-independent constraint modeling language that can employ a variety of solvers. In a case study, we explore optimizations of an industrial system that are enabled by scheduling and task allocation design decisions. Further, the performance of the proposed solutions is evaluated based on large set of synthetically generated system models.}, language = {en} } @inproceedings{LaloSailerMottoketal., author = {Lalo, Erjola and Sailer, Andreas and Mottok, J{\"u}rgen and Siemers, Christian}, title = {Overhead-Aware Schedule Synthesis for Logical Execution Time (LET) in Automotive Systems}, series = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, booktitle = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, publisher = {IEEE}, isbn = {978-1-6654-5985-3}, doi = {10.1109/SOCC56010.2022.9908103}, pages = {1 -- 6}, abstract = {The Logical Execution Time (LET) has recently been integrated in multi-core automotive systems to ensure timing and dataflow determinism. Although buffering mechanisms are introduced to incorporate LET semantics, they do not guarantee that tasks are executed within their LET frames. In fact, LET and buffering semantics are violated if scheduling is not designed to execute all tasks within their LET frames and in a specific order. In this paper, we describe a scheduling synthesis technique for Fixed-Priority Scheduling (FPS) to achieve resource-efficient execution of LET systems. The proposed approach considers LET semantics, scheduling overheads, and delays caused by operating system operations and provides the possibility to optimize the schedule with respect to aspects like scheduling overheads. Our performance and feasibility evaluation shows that the proposed algorithm provides results in a reasonable amount of time for models of complex industrial applications. Thus, the integration of the proposed algorithm into an automated process is of high benefit to accelerate the development of vehicle applications.}, language = {en} } @phdthesis{Lalo, author = {Lalo, Erjola}, title = {Deployment designs for multi-core-real time systems}, edition = {1. Auflage}, publisher = {Universit{\"a}tsverlag Regensburg}, address = {Regensburg}, isbn = {978-3-86845-181-8}, doi = {10.21268/20240712-0}, url = {http://nbn-resolving.de/urn:nbn:de:gbv:104-20240712-00000-7}, pages = {iii, 371}, abstract = {In modern embedded automotive systems, multi-core processors are used to provide higher execution performance and more computing capacity. However, they influence the way these systems are designed. Each change of the platform and application software results in an effort required to ensure and validate the functional correctness and timing requirements of these systems in a multi-core platform. For this reason, the use of the Logical Execution Time (LET) paradigm is advantageous for multi-core systems, as it satisfies these requirements by providing time and dataflow determinism, thereby reducing the development cycle and the impact of the platform in the design of such systems. To integrate LET into these systems, special mechanisms are required to satisfy its semantics. Therefore, this work focuses on buffering and scheduling techniques for resource efficient integration of LET in automotive systems. A buffering mechanism and an automatic schedule synthesis are proposed to guarantee functional correctness, timing requirements, and LET semantics and to reduce the increased demands of LET for memory and processor resources. A static and global buffering protocol is proposed, which compared to lock-based protocols has plausible memory needs and zero-communication overheads at the boundaries of LET intervals. The automatic schedule synthesis considers the Operating System (OS) overheads such that scheduling is optimized with respect to context-switching overheads caused by preemption. Buffering implements most of the LET semantics, but it provides no guarantee that tasks execute within their LET intervals. If scheduling is not designed to ensure that all tasks execute within their LET intervals, then functional correctness and LET semantics are violated. The manual design of a feasible schedule that satisfies the semantics and additional requirements of the application is inefficient and requires a significant amount of effort. Therefore, an automatic schedule generation approach for the Fixed-Priority Scheduling (FPS) and Time-Triggered Scheduling (TTS) is proposed. FPS is the widely used mechanism in the automotive domain because of its flexibility to handle dynamic changes of highly event-driven applications. Recently, TTS has attracted considerable attention in this domain to increase deterministic execution of tasks and efficient planning of processor resources. Therefore, schedule synthesis of FPS and TTS is provided to identify the efficiency, practicality, and resource optimization abilities of each approach for LET systems. To show the practicality of LET for industrial automotive systems, its integration into the software architecture of the classic platform of AUTomotive Open System Architecture (AUTOSAR) is described and a case study is conducted using a real world system.}, language = {en} }