@article{FreilingGrimmGrosspietschetal., author = {Freiling, Felix and Grimm, R{\"u}diger and Großpietsch, Karl-Erwin and Keller, Hubert B. and Mottok, J{\"u}rgen and M{\"u}nch, Isabel and Rannenberg, Kai and Saglietti, Francesca}, title = {Technische Sicherheit und Informationssicherheit. Unterschiede und Gemeinsamkeiten}, series = {Informatik-Spektrum}, volume = {37}, journal = {Informatik-Spektrum}, number = {1}, publisher = {Springer}, doi = {10.1007/s00287-013-0748-2}, pages = {14 -- 24}, language = {de} } @inproceedings{ThomeczekAttenbergerMatoušeketal., author = {Thomeczek, Ludwig and Attenberger, Andreas and Matoušek, V{\´a}clav and Mottok, J{\"u}rgen}, title = {Latenzen von POSIX Betriebssystemen im Kontext von Hypervisoren in Real-Time Systemen}, series = {Echtzeit und Sicherheit - Echtzeit 2018, Fachtagung des gemeinsamen Fachausschusses Echtzeitsysteme von Gesellschaft f{\"u}r Informatik e.V. (GI), VDI/VDE-Gesellschaft f{\"u}r Mess- und Automatisierungstechnik (GMA) und Informationstechnischer Gesellschaft im VDE (ITG), Boppard, 15. und 16. November 2018}, booktitle = {Echtzeit und Sicherheit - Echtzeit 2018, Fachtagung des gemeinsamen Fachausschusses Echtzeitsysteme von Gesellschaft f{\"u}r Informatik e.V. (GI), VDI/VDE-Gesellschaft f{\"u}r Mess- und Automatisierungstechnik (GMA) und Informationstechnischer Gesellschaft im VDE (ITG), Boppard, 15. und 16. November 2018}, isbn = {978-3-662-58095-0}, doi = {10.1007/978-3-662-58096-7_11}, pages = {99 -- 108}, abstract = {Neu eingef{\"u}hrte Funktionen in der Automobilindustrie, wie zum Beispiel das autonome Fahren, erfordern den Einsatz von performanten Mehrkernprozessoren sowie von komplexen (POSIXkompatiblen) Betriebssystemen. Im Rahmen des branchenspezifischen Preisdrucks kommt es zudem zu einer Konsolidierung von Steuerger{\"a}ten. Gleichzeitig erfordert der Einsatz im Automobil hohe funktionale Sicherheit (ASIL-Level), was unter anderem robuste Echtzeiteigenschaften der verwendeten Hard- und Software voraussetzt. Als Folge dessen werden zur Trennung von harten und weichen Echtzeitsystemen auf derselben Hardware Hypervisoren eingesetzt. Dieses Paper beleuchtet die Latenzauswirkungen diverser Softwarekonfigurationen auf Hardware der n{\"a}chsten Generation mithilfe eines vorgestellten Testsetups und dessen Ergebnissen.}, language = {de} } @inproceedings{MuchaMottokKraemer, author = {Mucha, Matthias and Mottok, J{\"u}rgen and Kr{\"a}mer, Stefan}, title = {Estimation of Worst Case Response Time Boundaries in Multi-Core Real-Time Systems}, series = {2017 International Conference on Applied Electronics (AE), 5-6 Sept. 2017, Pilsen}, booktitle = {2017 International Conference on Applied Electronics (AE), 5-6 Sept. 2017, Pilsen}, publisher = {IEEE}, isbn = {978-80-261-0641-8}, issn = {1803-7232}, doi = {10.23919/ae.2017.8053598}, pages = {1 -- 6}, abstract = {We address a novel probabilistic approach to estimate the Worst Case Response Time boundaries of tasks. Multi-core real-time systems process tasks in parallel on two or more cores. Tasks in our contribution may preempt other tasks, block tasks with semaphores to access global shared resources, or migrate to another core. The depicted task behavior is random. The shape of collected response times of a task within a processing time is multimodal. Extreme Value approaches need unimodal response time distributions to estimate the Worst Case Response Time of tasks. The new proposed method derives a set of three task set shapes from the source task set. It is used to minimize the uncertainty of random task behavior by maximizing the coverage of possible Worst Case Response Times. The case study evaluates the new proposed estimation method by the use of dynamically generated random tasks with varying task properties.}, language = {en} } @article{DeBradaMottoketal., author = {De, Sangita and Brada, Premek and Mottok, J{\"u}rgen and Niklas, Michael}, title = {The Empirical Evaluation of Semantic Alignment Quality Metrics for Vehicle Domain Component Frameworks Interface Ontologies}, series = {FLAIRS 2021 : The 34th International FLAIRS Conference. Proceedings}, volume = {34}, journal = {FLAIRS 2021 : The 34th International FLAIRS Conference. Proceedings}, number = {1}, publisher = {LibraryPress@UF}, doi = {10.32473/flairs.v34i1.128512}, pages = {6}, abstract = {Semantic alignment of application software components' ontologies represents a great interest in vehicle application domains that manipulate heterogeneous overlapping knowledge application frameworks. In the past few years, with the growth in the novel vehicle service requirements such as autonomous driving, V2X (Vehicle-to-Vehicle communication) and many others, automotive application software component models are becoming increasingly collaborative with other qualified cross-enterprise industrial partners to accomplish these complex service requirements. The most daunting impediment to this cross-enterprise collaboration is semantic interoperability. For efficient services collaboration through cross-enterprise semantic interoperability between the vehicle application frameworks' software components, aligning the interface ontologies of these components by identifying the depth of semantic alignment relationships between the concepts of the interface ontologies is the major focus of this paper. In contrast to several existing ontology structural metrics, this work defines, evaluates and validates ontology metrics to measure the depth of semantic alignment between the vehicle domain software component frameworks' interface ontological models. To emphasize the substantial role of semantic alignment of software component frameworks' interface ontologies in semantic interoperability, a typical vehicle domain case study involving vehicle applications is considered for demonstration.}, language = {en} } @article{SchmidFritzMottok, author = {Schmid, Michael and Fritz, Florian and Mottok, J{\"u}rgen}, title = {Fine-grained parallelism framework with predictable work-stealing for real-time multiprocessor systems}, series = {Journal of Systems Architecture}, volume = {124}, journal = {Journal of Systems Architecture}, number = {March}, publisher = {Elsevier}, doi = {10.1016/j.sysarc.2022.102393}, abstract = {Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems. In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture.}, language = {en} } @article{JosephSchummRummeletal., author = {Joseph, Saskia and Schumm, Michael and Rummel, Otmar and Soska, Alexander and Renschke, Michael and Mottok, J{\"u}rgen and Niemetz, Michael and Schroll-Decker, Irmgard}, title = {Teaching finite state machines with case method and role play}, series = {2014 IEEE Global Engineering Education Conference (EDUCON 2014) : Istanbul, Turkey, 3 - 5 April 2014}, journal = {2014 IEEE Global Engineering Education Conference (EDUCON 2014) : Istanbul, Turkey, 3 - 5 April 2014}, publisher = {IEEE}, doi = {10.1109/EduCon.2013.6530275}, pages = {1302 -- 1305}, abstract = {The professional requirements in Software Engineering have become highly volatile due to the complexities of project development and rapid and innovative changes occurring in the field. Therefore, the development of inter-personal and social competences has gained central importance in the training of software developers. This paper will present a concept allowing to acquire competences by using Case Method and Role Play as instruments in several lectures of Software Engineering. By approaching the issue of competence acquisition on a technical as well as on an educational and social level, life-long learning is facilitated and supported.}, language = {en} } @inproceedings{PozzobonRennerMottoketal., author = {Pozzobon, Enrico and Renner, Sebastian and Mottok, J{\"u}rgen and Matoušek, V{\´a}clav}, title = {An optimized Bitsliced Masked Adder for ARM Thumb-2 Controllers}, series = {27th International Conference on Applied Electronics (AE): Sep 6, 2022 - Sep 7, 2022, Pilsen, Czech Republic}, booktitle = {27th International Conference on Applied Electronics (AE): Sep 6, 2022 - Sep 7, 2022, Pilsen, Czech Republic}, publisher = {IEEE}, doi = {10.1109/AE54730.2022.9919884}, pages = {4}, abstract = {The modular addition is used as a non-linear operation in ARX ciphers because it achieves the requirement of introducing non-linearity in a cryptographic primitive while only taking one clock cycle to execute on most modern architectures. This makes ARX ciphers especially fast in software implementations, but comes at the cost of making it harder to protect against side-channel information leakages using Boolean masking: the best known 2-shares masked adder for ARM Thumb micro-controllers takes 83 instructions to add two 32-bit numbers together. Our approach is to operate in bitsliced mode, performing 32 additions in parallel on a 32-bit microcontroller. We show that, even after taking into account the cost of bitslicing before and after the encryption, it is possible to achieve a higher throughput on the tested ciphers (CRAX and ChaCha20) when operating in bitsliced mode. Furthermore, we prove that no first-order information leakage is happening in either simulated power traces and power traces acquired from real hardware, after sufficient countermeasures are put into place to guard against pipeline leakages.}, language = {en} } @inproceedings{LaloSailerMottoketal., author = {Lalo, Erjola and Sailer, Andreas and Mottok, J{\"u}rgen and Siemers, Christian}, title = {Overhead-Aware Schedule Synthesis for Logical Execution Time (LET) in Automotive Systems}, series = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, booktitle = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, publisher = {IEEE}, isbn = {978-1-6654-5985-3}, doi = {10.1109/SOCC56010.2022.9908103}, pages = {1 -- 6}, abstract = {The Logical Execution Time (LET) has recently been integrated in multi-core automotive systems to ensure timing and dataflow determinism. Although buffering mechanisms are introduced to incorporate LET semantics, they do not guarantee that tasks are executed within their LET frames. In fact, LET and buffering semantics are violated if scheduling is not designed to execute all tasks within their LET frames and in a specific order. In this paper, we describe a scheduling synthesis technique for Fixed-Priority Scheduling (FPS) to achieve resource-efficient execution of LET systems. The proposed approach considers LET semantics, scheduling overheads, and delays caused by operating system operations and provides the possibility to optimize the schedule with respect to aspects like scheduling overheads. Our performance and feasibility evaluation shows that the proposed algorithm provides results in a reasonable amount of time for models of complex industrial applications. Thus, the integration of the proposed algorithm into an automated process is of high benefit to accelerate the development of vehicle applications.}, language = {en} } @inproceedings{FrauenschlaegerMottok, author = {Frauenschl{\"a}ger, Tobias and Mottok, J{\"u}rgen}, title = {Security-Gateway for SCADA-Systems in Critical Infrastructures}, series = {27th International Conference on Applied Electronics (AE): 06-07 September 2022, Pilsen, CZ}, booktitle = {27th International Conference on Applied Electronics (AE): 06-07 September 2022, Pilsen, CZ}, publisher = {IEEE}, doi = {10.1109/AE54730.2022.9920070}, pages = {6}, abstract = {Supervisory Control and Data Acquisition (SCADA) systems are used to control and monitor components within the energy grid, playing a significant role in the stability of the system. As a part of critical infrastructures, components in these systems have to fulfill a variety of different requirements regarding their dependability and must also undergo strict audit procedures in order to comply with all relevant standards. This results in a slow adoption of new functionalities. Due to the emerged threat of cyberattacks against critical infrastructures, extensive security measures are needed within these systems to protect them from adversaries and ensure a stable operation. In this work, a solution is proposed to integrate extensive security measures into current systems. By deploying additional security-gateways into the communication path between two nodes, security features can be integrated transparently for the existing components. The developed security-gateway is compliant to all regulatory requirements and features an internal architecture based on the separation-of-concerns principle to increase its security and longevity. The viability of the proposed solution has been verified in different scenarios, consisting of realistic field tests, security penetration tests and various performance evaluations.}, language = {en} } @inproceedings{SchmidMottok, author = {Schmid, Michael and Mottok, J{\"u}rgen}, title = {Investigation of Scheduling Algorithms for DAG. Tasks through Simulations}, series = {ERTS 2022, 11th European Congress Embedded Real Time Systems: 1-2 June, Toulouse, France}, booktitle = {ERTS 2022, 11th European Congress Embedded Real Time Systems: 1-2 June, Toulouse, France}, pages = {9}, abstract = {In the real-time systems sector, various task models and corresponding tests exist to model and verify the schedulability of task sets on the system at hand. While those models and schedulability tests have intensively been studied from a theoretical point of view, it is hard to ma e use of them to compare the actual execution behavior of scheduling algorithms on a real system. In contrast to schedulability tests, simulators can help to investigate the performance of specific scheduling algorithms. One of the most generalized task models to describe parallel tasks is the Directed Acyclic Graph model that allows to represent tasks as a series of subtasks that depict the potentially parallel computations and precedence constraints that denote the order in which the subtasks are allowed to execute. In this paper, we investigate various scheduling algorithms for the Directed Acyclic Graph model. For that, we first recapitulate the examined scheduling algorithms in detail and point out relevant differences. Subsequently, we present the evaluation of different global and federated scheduling algorithms using fine-grained parallel tasks. To this end, we generate random Directed Acyclic Graph tasks and simulate their execution on multiprocessor systems using scheduling algorithms such as global rate-monotonic and semi-federated scheduling as well as global scheduling policies using the thread pool model.}, language = {en} } @inproceedings{GrabingerHauserMottok, author = {Grabinger, Lisa and Hauser, Florian and Mottok, J{\"u}rgen}, title = {Accessing the Presentation of Causal Graphs and an Application of Gestalt Principles with Eye Tracking}, series = {2022 IEEE International Conference on Software Analysis, Evolution and Reengineering (SANER 2022), 1st Workshop on Advances in Human-Centric Experiments in Software Engineering (HUMAN 2022): 15-18 March 2022, Honolulu, HI, USA}, booktitle = {2022 IEEE International Conference on Software Analysis, Evolution and Reengineering (SANER 2022), 1st Workshop on Advances in Human-Centric Experiments in Software Engineering (HUMAN 2022): 15-18 March 2022, Honolulu, HI, USA}, publisher = {IEEE}, doi = {10.1109/SANER53432.2022.00153}, pages = {1278 -- 1285}, abstract = {The discipline of causal inference uses so-called causal graphs to model cause and effect relations of random variables. As those graphs only encode a relation structure there is no hard rule concerning their alignment. The present paper presents a study with the aim of working out the optimal alignment of causal graphs with respect to comprehensibility and interestingness. In addition, the study examines whether the central gestalt principles of psychology apply for causal graphs. Data from 29 participants is acquired by triangulating eye tracking with a questionnaire. The results of the study suggest that causal graphs should be aligned downwards. Moreover, the gestalt principles proximity, similarity and closure are shown to hold true for causal graphs.}, language = {en} } @misc{RennerPozzobonMottok, author = {Renner, Sebastian and Pozzobon, Enrico and Mottok, J{\"u}rgen}, title = {3rd Round Ciphers Evaluation on Microcontrollers}, series = {Lightweight Cryptography Workshop (virtual): May 9-11 2022}, journal = {Lightweight Cryptography Workshop (virtual): May 9-11 2022}, publisher = {National Institute of Standards and Technology (NIST)}, address = {Gaithersburg}, language = {en} }