@article{SchmidFritzMottok, author = {Schmid, Michael and Fritz, Florian and Mottok, J{\"u}rgen}, title = {Fine-Grained Parallel Applications in Real-Time Multiprocessor Systems}, series = {Journal of Systems Architecture}, volume = {124}, journal = {Journal of Systems Architecture}, publisher = {Elsevier}, doi = {10.1016/j.sysarc.2022.102393}, abstract = {Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems. In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture.}, language = {en} } @article{WeissPozzobonMottoketal., author = {Weiss, Nils and Pozzobon, Enrico and Mottok, J{\"u}rgen and Matoušek, V{\´a}clav}, title = {Automated Reverse Engineering of CAN Protocols}, series = {Neural Network World}, volume = {31}, journal = {Neural Network World}, number = {4}, issn = {1210-0552}, doi = {10.14311/NNW.2021.31.015}, pages = {279 -- 295}, abstract = {Car manufacturers define proprietary protocols to be used inside their vehicular networks, which are kept an industrial secret, therefore impeding independent researchers from extracting information from these networks. This article describes a statistical and a neural network approach that allows reverse engineering proprietary controller area network (CAN)-protocols assuming they were designed using the data base CAN (DBC) file format. The proposed algorithms are tested with CAN traces taken from a real car. We show that our approaches can correctly reverse engineer CAN messages in an automated manner.}, language = {en} } @article{DeNiklasBrianetal., author = {De, Sangita and Niklas, Michael and Brian, Rooney and Mottok, J{\"u}rgen and Brada, Premek}, title = {Semantic Mapping of Component Framework Interface Ontologies for Interoperability of Vehicle Applications}, series = {Procedia Computer Science}, volume = {170}, journal = {Procedia Computer Science}, number = {2}, publisher = {Elsevier}, doi = {10.1016/j.procs.2020.03.151}, pages = {813 -- 818}, abstract = {Over the past few years, ontology merging, and ontology semantic alignment has gained significant interest as research topics in automotive application domain for finding solutions to semantic data heterogeneity. To accomplish the complex and novel vehicle service requirements such as autonomous driving, V2X (Vehicle-to-Vehicle communication), etc. the automotive applications involve collaborations of several platform-specific data from heterogeneous enterprises component frameworks and consequently there has been increase in data interoperability issues. At the application component level, data interoperability relies on the semantic alignment or mapping between the various component framework interfaces data models represented as XML schemas (XSD). With the XML schemas being the preferred standard for the interface description exchange between most of the automotive application domain components, however, the data interoperability between the semantically equivalent but structurally different data constructs of multiple heterogeneous XSDs stands as a challenge in the absence of an ontology-based approach. To confront this crucial requirement for data interoperability and to increase in effect the reuse of existing components through their interfaces, we propose an approach to semantically map the various component framework interface data models when expressed as ontology schemas, based on the exploration of semantic synergies. The transformation between XSD and RDF (Resource Description Framework) schema representations and the use of queries over the ontology schemas for semantic mapping are demonstrated including a real-world case study.}, language = {en} } @inproceedings{SchmidMottok, author = {Schmid, Michael and Mottok, J{\"u}rgen}, title = {Response Time Analysis of Parallel Real-Time DAG Tasks Scheduled by Thread Pools}, series = {29th International Conference on Real-Time Networks and Systems (RTNS 2021): 07.04. - 09 04 2021, Nantes, France}, booktitle = {29th International Conference on Real-Time Networks and Systems (RTNS 2021): 07.04. - 09 04 2021, Nantes, France}, editor = {Queudet, Audrey}, publisher = {Association for Computing Machinery}, address = {New York}, isbn = {9781450390019}, doi = {10.1145/3453417.3453419}, pages = {173 -- 183}, abstract = {Modern high-end embedded systems nowadays have to process enormous amounts of data. In order to speed up the computations and fully exploit the resources of the underlying hardware architectures, software developers can avail parallelism frameworks such as Intel Threading Building Blocks or compiler extensions as OpenMP. They ease the development of parallel applications by providing interfaces for common parallel design patterns and by internally distributing the work among the workers of a thread pool. However, such frameworks and compiler extensions do not yet support the stringent timing requirements of real-time systems and therefore, an adaption of their computation model to the sector of real-time systems needs to be conducted. In this paper, we address the problem of scheduling parallel real-time directed acyclic graphs tasks on multiprocessor architectures where the subtasks are dispatched among and executed by the workers of a thread pool. In contrast to existing work in the state-of-the-art, we limit the maximum parallelism of real-time tasks not by the number of processors in the system, but by the number of worker threads used in the thread pool of each real-time application. For this model, we derive a worst-case response time analysis for task sets scheduled by a preemptive global fixed-priority scheduler. In order to evaluate the performance of our response time analysis, we further perform schedulability tests on generated task sets and compare the results to existing feasibility analyses in the current state-of-the-art.}, language = {en} } @article{FuhrmannMottok, author = {Fuhrmann, Thomas and Mottok, J{\"u}rgen}, title = {Ethical, intercultural and professional impulses integrated into a transmission systems lecture}, series = {2017 IEEE Global Engineering Education Conference (EDUCON), 25-28 April 2017, Athens, Greece}, journal = {2017 IEEE Global Engineering Education Conference (EDUCON), 25-28 April 2017, Athens, Greece}, publisher = {IEEE}, doi = {10.1109/EDUCON.2017.7942829}, pages = {92 -- 95}, abstract = {In the sixth semester of the bachelor study course "Electrical Engineering and Information Technology", a lecture "Transmission Systems" is given. It explains basic principles, circuits and systems of electrical and optical transmission systems. Short intellectual impulses, which address professional, intercultural and ethical issues of engineers' working life are integrated into this regular lecture. In each lecture unit, an impulse with one specific topic is given approximately in the middle of the lecture hour. An evaluation was done at the end of the semester, which shows that most of the students remember the discussed topics and state high interest due to high importance for their professional life. Due to these encouraging results, this concept will be developed further.}, language = {en} } @inproceedings{KoppKoehlerMottok, author = {Kopp, Felix and K{\"o}hler, Thorsten and Mottok, J{\"u}rgen}, title = {Bildgebende Verfahren zur dreidimensionalen Rekonstruktion aus Bildsequenzen basierend auf der Bundler SFM Toolchain}, series = {4. Landshuter Symposium Mikrosystemtechnik : Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, booktitle = {4. Landshuter Symposium Mikrosystemtechnik : Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, editor = {Ivanov, Artem and Bicker, Marc and Patzelt, Peter}, address = {Landshut}, isbn = {978-3-9812696-5-9}, pages = {118 -- 125}, abstract = {Vorgestellt wird der Structure from Motion (SFM)Toolchain Bundler zur Erzeugung von Punktwolken aus unkalibrierten Kameraaufnahmen und deren Optimierungsm{\"o}glichkeiten durch zeitnahe Verfahren zur Interessenpunktextraktion. Das Extrahieren markanter Punkte aus Bildern beinhaltet eines der zeitintensivsten sowie herausforderndsten Aufgaben im dreidimensionalen Rekonstruktionsprozess. Vor allem im Hinblick auf die Integration von Structure from Motion Verfahren auf eingebettete Systeme sind Rechenzeit und Speicherverbrauch von hohem Interesse. F{\"u}r dreidimensionale Rekonstruktionsalgorithmen ist das Finden akkurater Punktkorrespondenzen von hoher Priorit{\"a}t. Die Anforderungen an Punktdetektor, -deskriptor und -matcher sind dementsprechend hoch. Untersucht wurden die Ans{\"a}tze zur Interessenpunktextraktion. Hierzu geh{\"o}ren, der von der Bundler SFM Toolchain genutzte, Scale-invariant feature transform (SIFT) sowie Speeded Up Robust Features (SURF), Binary Robust Invariant Scalable Keypoints (BRISK) und Fast Retina Keypoint (FREAK). Es wird gezeigt, dass das Ersetzen von SIFT in der Toolchain vor allem durch die bin{\"a}ren Deskriptoren BRISK und FREAK zu wesentlich k{\"u}rzeren Laufzeiten f{\"u}hren kann. Dies ist vor allem f{\"u}r eingebettete Systeme mit eingeschr{\"a}nkter Rechenleistung von Bedeutung. In Bezug auf die Genauigkeit der gefundenen Punktkorrespondenzen {\"u}bertreffen sowohl FREAK als auch BRISK die nicht bin{\"a}ren Ans{\"a}tze im Anwendungsprofil. Zur Beschreibung von Interessenpunkten sind die bin{\"a}ren Ans{\"a}tze eine sinnvolle Optimierungsm{\"o}glichkeit hinsichtlich Laufzeit und Genauigkeit, w{\"a}hrend der in BRISK enthaltene Detektor nicht an die Performance der nicht bin{\"a}ren Alternativen herankommt. Insgesamt betrachtet wurden die besten Ergebnisse (Laufzeit und Genauigkeit) mit den Kombinationen SURF/FREAK und SURF/BRISK erreicht. Die evaluierten Algorithmen(SIFT,SURF,BRISK,FREAK) sollen k{\"u}nftig in der Umgebung einer kompletten 3D-Rekonstruktions-Toolchain getestet und ausgewertet werden. Hierbei ist auch auf die Abh{\"a}ngigkeit von verschiedenen Matching-Verfahren zu achten. Dar{\"u}ber hinaus sollen weitere Optimierungsm{\"o}glichkeiten f{\"u}r Anwendungen basierend auf B{\"u}ndelausgleichung untersucht werden.}, language = {de} } @inproceedings{BayerNoebauerMottok, author = {Bayer, Michael and Noebauer, Josef and Mottok, J{\"u}rgen}, title = {Weiterentwicklung eines portablen OSEK-OS basierten Echtzeitbetriebssystems zu einem konfigurierbaren AUTOSAR-OS}, series = {4. Landshuter Symposium Mikrosystemtechnik, Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, booktitle = {4. Landshuter Symposium Mikrosystemtechnik, Mikrosystemtechnik als Schl{\"u}sseltechnologie der Systemintegration, Tagungsband zum Symposium 12./13. M{\"a}rz 2014, Hochschule Landshut}, address = {Landshut}, isbn = {978-3-9812696-5-9}, pages = {154 -- 161}, abstract = {AUTOSAR spezifiziert ein statisches Echtzeitbetriebssystem (AUTOSAR-OS), welches auf die Bed{\"u}rfnisse der Automobilindustrie zugeschnitten ist. Dabei stellt die AUTOSAR-OS-Spezifikation im Wesentlichen eine Weiterentwicklung von OSEK-OS dar. Die Unterschiede zu einem OSEK-OS sind im Wesentlichen eine erweiterte Programmierschnittstelle f{\"u}r Counter, Schedule Tables zur Abbildung komplexer zeitgesteuerter Abl{\"a}ufe und Stack Monitoring. Der Scheduler arbeitet priorit{\"a}tsbasiert und unterst{\"u}tzt unterbrechbare und nicht unterbrechbare Tasks. Eine Ressourcenverwaltung mit Priority Ceiling Protokoll verhindert Deadlocks und Priorit{\"a}teninversion. Tasks sind entweder als "Basic Tasks" oder "Extended Tasks" konfiguriert. Nach einer kurzen Vorstellung der OS-Spezifikation wird eine darauf basierte Architektur f{\"u}r das Betriebssystem hergeleitet. Die konkrete Implementierung ist aufgeteilt in einen konfigurationsabh{\"a}ngigen Teil und einen statischen Quellcodeteil. Der konfigurationsabh{\"a}ngige Teil wird von einem Quellcodegenerator erzeugt. Der statische Teil wird in einer Schichtenarchitektur erstellt, um eine Trennung zwischen plattformabh{\"a}ngigem und plattformunabh{\"a}ngigem Quellcode zu erreichen, da die hierf{\"u}r vorgesehene AUTOSAR-Methode nicht ausreicht. Die Portierung des OS auf eine neue Hardwareplattform zeigt, dass nur die plattormabh{\"a}ngige Quellcodeschicht des Betriebssystems ge{\"a}ndert werden muss. Bei der Validierung des Betriebssystems wurde neben einem funktionellen Test auch die Performance f{\"u}r charakteristische Aufgaben, wie beispielsweise einem Kontextwechsel, gemessen. Diese Werte werden mit einem kommerziellen, stark optimierten AUTOSAR-OS verglichen.}, language = {de} } @inproceedings{HauserMottokGruber, author = {Hauser, Florian and Mottok, J{\"u}rgen and Gruber, Hans}, title = {Eye Tracking Metrics in Software Engineering}, series = {Proceedings of the 3rd European Conference of Software Engineering Education (ECSEE'18); Seeon/ Bavaria Germany, 14.06.2018 -15.06.2018}, booktitle = {Proceedings of the 3rd European Conference of Software Engineering Education (ECSEE'18); Seeon/ Bavaria Germany, 14.06.2018 -15.06.2018}, editor = {Mottok, J{\"u}rgen}, publisher = {ACM}, address = {New York, NY}, isbn = {9781450363839}, doi = {10.1145/3209087.3209092}, pages = {39 -- 44}, abstract = {This paper aims to provide an overview of the interdisciplinary combination of educational science, psychology, software engineering and the eye tracking methodology. The domain of software engineering is offering great potential for applied eye tracking research and in turn it can benefit from the possibilities of this upcoming technology as well. Nevertheless, software engineering has to struggle with some obstacles. These are namely the different terms, missing guidelines for experimental setups and a lack of common and standardized metrics. If eye tracking should be used in a broader way these problems must be solved. The main purpose of this paper is to list all eye tracking metrics which are relevant for software engineering and to give guidelines to help beginners by avoiding possible pitfalls.}, language = {en} } @inproceedings{ThomeczekAttenbergerKolbetal., author = {Thomeczek, Ludwig and Attenberger, Andreas and Kolb, Johannes and Matoušek, V{\´a}clav and Mottok, J{\"u}rgen}, title = {Betrachtungen zu Latenzquellen und deren Beobachtung in POSIX-Systemen am Beispiel von Container-Runtimes}, series = {Echtzeit 2019}, volume = {35}, booktitle = {Echtzeit 2019}, editor = {Unger, Herwig}, publisher = {Springer Fachmedien Wiesbaden}, address = {Wiesbaden}, isbn = {978-3-658-27807-6}, doi = {10.1007/978-3-658-27808-3_12}, pages = {109 -- 118}, abstract = {Die am weitesten verbreiteten autonomen Systeme der Zukunft sind aller Voraussicht nach intelligente Fahrzeuge, welche selbst{\"a}ndig im Straßenverkehr navigieren und mit der Umgebung interagieren. Diese neuen Funktionen erfordern den Einsatz von performanten Mehrkernprozessoren sowie von komplexen (POSIX-kompatiblen) Betriebssystemen. Gleichzeitig erfordert der Einsatz im Automobil hohe funktionale Sicherheit (ASIL-Level), was unter anderem robuste Echtzeiteigenschaften der verwendeten Hard- und Software voraussetzt. Den Echtzeiteigenschaften steht die erh{\"o}hte Komplexit{\"a}t mit neuen Quellen f{\"u}r nichtdeterministische Latenzen gegen{\"u}ber. In diesem Paper pr{\"a}sentieren wir eine {\"U}bersicht {\"u}ber diese neuen Einflussfaktoren, und vermessen anschließend Containerlaufzeitumgebungen und deren Latenzverhalten. Wir zeigen dabei, das Netzwerkbr{\"u}cken unter Last erheblichen Einfluss (Faktor 4-5) auf die Netzwerklatenz aus{\"u}ben k{\"o}nnen.}, language = {de} } @article{FreilingGrimmGrosspietschetal., author = {Freiling, Felix and Grimm, R{\"u}diger and Großpietsch, Karl-Erwin and Keller, Hubert B. and Mottok, J{\"u}rgen and M{\"u}nch, Isabel and Rannenberg, Kai and Saglietti, Francesca}, title = {Technische Sicherheit und Informationssicherheit. Unterschiede und Gemeinsamkeiten}, series = {Informatik-Spektrum}, volume = {37}, journal = {Informatik-Spektrum}, number = {1}, publisher = {Springer}, doi = {10.1007/s00287-013-0748-2}, pages = {14 -- 24}, language = {de} } @inproceedings{ThomeczekAttenbergerMatoušeketal., author = {Thomeczek, Ludwig and Attenberger, Andreas and Matoušek, V{\´a}clav and Mottok, J{\"u}rgen}, title = {Latenzen von POSIX Betriebssystemen im Kontext von Hypervisoren in Real-Time Systemen}, series = {Echtzeit und Sicherheit - Echtzeit 2018, Fachtagung des gemeinsamen Fachausschusses Echtzeitsysteme von Gesellschaft f{\"u}r Informatik e.V. (GI), VDI/VDE-Gesellschaft f{\"u}r Mess- und Automatisierungstechnik (GMA) und Informationstechnischer Gesellschaft im VDE (ITG), Boppard, 15. und 16. November 2018}, booktitle = {Echtzeit und Sicherheit - Echtzeit 2018, Fachtagung des gemeinsamen Fachausschusses Echtzeitsysteme von Gesellschaft f{\"u}r Informatik e.V. (GI), VDI/VDE-Gesellschaft f{\"u}r Mess- und Automatisierungstechnik (GMA) und Informationstechnischer Gesellschaft im VDE (ITG), Boppard, 15. und 16. November 2018}, isbn = {978-3-662-58095-0}, doi = {10.1007/978-3-662-58096-7_11}, pages = {99 -- 108}, abstract = {Neu eingef{\"u}hrte Funktionen in der Automobilindustrie, wie zum Beispiel das autonome Fahren, erfordern den Einsatz von performanten Mehrkernprozessoren sowie von komplexen (POSIXkompatiblen) Betriebssystemen. Im Rahmen des branchenspezifischen Preisdrucks kommt es zudem zu einer Konsolidierung von Steuerger{\"a}ten. Gleichzeitig erfordert der Einsatz im Automobil hohe funktionale Sicherheit (ASIL-Level), was unter anderem robuste Echtzeiteigenschaften der verwendeten Hard- und Software voraussetzt. Als Folge dessen werden zur Trennung von harten und weichen Echtzeitsystemen auf derselben Hardware Hypervisoren eingesetzt. Dieses Paper beleuchtet die Latenzauswirkungen diverser Softwarekonfigurationen auf Hardware der n{\"a}chsten Generation mithilfe eines vorgestellten Testsetups und dessen Ergebnissen.}, language = {de} } @inproceedings{MuchaMottokKraemer, author = {Mucha, Matthias and Mottok, J{\"u}rgen and Kr{\"a}mer, Stefan}, title = {Estimation of Worst Case Response Time Boundaries in Multi-Core Real-Time Systems}, series = {2017 International Conference on Applied Electronics (AE), 5-6 Sept. 2017, Pilsen}, booktitle = {2017 International Conference on Applied Electronics (AE), 5-6 Sept. 2017, Pilsen}, publisher = {IEEE}, isbn = {978-80-261-0641-8}, issn = {1803-7232}, doi = {10.23919/ae.2017.8053598}, pages = {1 -- 6}, abstract = {We address a novel probabilistic approach to estimate the Worst Case Response Time boundaries of tasks. Multi-core real-time systems process tasks in parallel on two or more cores. Tasks in our contribution may preempt other tasks, block tasks with semaphores to access global shared resources, or migrate to another core. The depicted task behavior is random. The shape of collected response times of a task within a processing time is multimodal. Extreme Value approaches need unimodal response time distributions to estimate the Worst Case Response Time of tasks. The new proposed method derives a set of three task set shapes from the source task set. It is used to minimize the uncertainty of random task behavior by maximizing the coverage of possible Worst Case Response Times. The case study evaluates the new proposed estimation method by the use of dynamically generated random tasks with varying task properties.}, language = {en} } @article{DeBradaMottoketal., author = {De, Sangita and Brada, Premek and Mottok, J{\"u}rgen and Niklas, Michael}, title = {The Empirical Evaluation of Semantic Alignment Quality Metrics for Vehicle Domain Component Frameworks Interface Ontologies}, series = {FLAIRS 2021 : The 34th International FLAIRS Conference. Proceedings}, volume = {34}, journal = {FLAIRS 2021 : The 34th International FLAIRS Conference. Proceedings}, number = {1}, publisher = {LibraryPress@UF}, doi = {10.32473/flairs.v34i1.128512}, pages = {6}, abstract = {Semantic alignment of application software components' ontologies represents a great interest in vehicle application domains that manipulate heterogeneous overlapping knowledge application frameworks. In the past few years, with the growth in the novel vehicle service requirements such as autonomous driving, V2X (Vehicle-to-Vehicle communication) and many others, automotive application software component models are becoming increasingly collaborative with other qualified cross-enterprise industrial partners to accomplish these complex service requirements. The most daunting impediment to this cross-enterprise collaboration is semantic interoperability. For efficient services collaboration through cross-enterprise semantic interoperability between the vehicle application frameworks' software components, aligning the interface ontologies of these components by identifying the depth of semantic alignment relationships between the concepts of the interface ontologies is the major focus of this paper. In contrast to several existing ontology structural metrics, this work defines, evaluates and validates ontology metrics to measure the depth of semantic alignment between the vehicle domain software component frameworks' interface ontological models. To emphasize the substantial role of semantic alignment of software component frameworks' interface ontologies in semantic interoperability, a typical vehicle domain case study involving vehicle applications is considered for demonstration.}, language = {en} } @article{SchmidFritzMottok, author = {Schmid, Michael and Fritz, Florian and Mottok, J{\"u}rgen}, title = {Fine-grained parallelism framework with predictable work-stealing for real-time multiprocessor systems}, series = {Journal of Systems Architecture}, volume = {124}, journal = {Journal of Systems Architecture}, number = {March}, publisher = {Elsevier}, doi = {10.1016/j.sysarc.2022.102393}, abstract = {Lately, parallel task models have received much attention in the development of real-time multiprocessor systems, as they allow highly compute-intensive tasks to have shorter deadlines which is very much required in modern reactive systems. However, missing modularity and portability can make parallel programming a cumbersome endeavor. As a consequence, compute-intensive sectors in the desktop and server segment have relied on parallelism frameworks such as Intel Threading Building Blocks, Cilk and OpenMP. These parallelism frameworks, however, are optimized for decent average case performance and consequently, do not meet the strict requirements imposed by real-time systems. In this paper, we present a proof-of-concept parallelism framework which was implemented in particular for soft real-time systems and having tight timing and safety requirements of such critical systems in mind. The proposed runtime system implements static memory allocation in a work-stealing environment that conforms to the strict space and tight probabilistic time bounds of work-stealing schedulers. Furthermore, we evaluate the performance of this framework by conducting multiprogrammed benchmarks on a real-time embedded multicore architecture.}, language = {en} } @article{JosephSchummRummeletal., author = {Joseph, Saskia and Schumm, Michael and Rummel, Otmar and Soska, Alexander and Renschke, Michael and Mottok, J{\"u}rgen and Niemetz, Michael and Schroll-Decker, Irmgard}, title = {Teaching finite state machines with case method and role play}, series = {2014 IEEE Global Engineering Education Conference (EDUCON 2014) : Istanbul, Turkey, 3 - 5 April 2014}, journal = {2014 IEEE Global Engineering Education Conference (EDUCON 2014) : Istanbul, Turkey, 3 - 5 April 2014}, publisher = {IEEE}, doi = {10.1109/EduCon.2013.6530275}, pages = {1302 -- 1305}, abstract = {The professional requirements in Software Engineering have become highly volatile due to the complexities of project development and rapid and innovative changes occurring in the field. Therefore, the development of inter-personal and social competences has gained central importance in the training of software developers. This paper will present a concept allowing to acquire competences by using Case Method and Role Play as instruments in several lectures of Software Engineering. By approaching the issue of competence acquisition on a technical as well as on an educational and social level, life-long learning is facilitated and supported.}, language = {en} } @inproceedings{PozzobonRennerMottoketal., author = {Pozzobon, Enrico and Renner, Sebastian and Mottok, J{\"u}rgen and Matoušek, V{\´a}clav}, title = {An optimized Bitsliced Masked Adder for ARM Thumb-2 Controllers}, series = {27th International Conference on Applied Electronics (AE): Sep 6, 2022 - Sep 7, 2022, Pilsen, Czech Republic}, booktitle = {27th International Conference on Applied Electronics (AE): Sep 6, 2022 - Sep 7, 2022, Pilsen, Czech Republic}, publisher = {IEEE}, doi = {10.1109/AE54730.2022.9919884}, pages = {4}, abstract = {The modular addition is used as a non-linear operation in ARX ciphers because it achieves the requirement of introducing non-linearity in a cryptographic primitive while only taking one clock cycle to execute on most modern architectures. This makes ARX ciphers especially fast in software implementations, but comes at the cost of making it harder to protect against side-channel information leakages using Boolean masking: the best known 2-shares masked adder for ARM Thumb micro-controllers takes 83 instructions to add two 32-bit numbers together. Our approach is to operate in bitsliced mode, performing 32 additions in parallel on a 32-bit microcontroller. We show that, even after taking into account the cost of bitslicing before and after the encryption, it is possible to achieve a higher throughput on the tested ciphers (CRAX and ChaCha20) when operating in bitsliced mode. Furthermore, we prove that no first-order information leakage is happening in either simulated power traces and power traces acquired from real hardware, after sufficient countermeasures are put into place to guard against pipeline leakages.}, language = {en} } @inproceedings{LaloSailerMottoketal., author = {Lalo, Erjola and Sailer, Andreas and Mottok, J{\"u}rgen and Siemers, Christian}, title = {Overhead-Aware Schedule Synthesis for Logical Execution Time (LET) in Automotive Systems}, series = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, booktitle = {2022 IEEE 35th International System-on-Chip Conference (SOCC): 05-08 September 2022, Belfast, United Kingdom}, publisher = {IEEE}, isbn = {978-1-6654-5985-3}, doi = {10.1109/SOCC56010.2022.9908103}, pages = {1 -- 6}, abstract = {The Logical Execution Time (LET) has recently been integrated in multi-core automotive systems to ensure timing and dataflow determinism. Although buffering mechanisms are introduced to incorporate LET semantics, they do not guarantee that tasks are executed within their LET frames. In fact, LET and buffering semantics are violated if scheduling is not designed to execute all tasks within their LET frames and in a specific order. In this paper, we describe a scheduling synthesis technique for Fixed-Priority Scheduling (FPS) to achieve resource-efficient execution of LET systems. The proposed approach considers LET semantics, scheduling overheads, and delays caused by operating system operations and provides the possibility to optimize the schedule with respect to aspects like scheduling overheads. Our performance and feasibility evaluation shows that the proposed algorithm provides results in a reasonable amount of time for models of complex industrial applications. Thus, the integration of the proposed algorithm into an automated process is of high benefit to accelerate the development of vehicle applications.}, language = {en} } @inproceedings{FrauenschlaegerMottok, author = {Frauenschl{\"a}ger, Tobias and Mottok, J{\"u}rgen}, title = {Security-Gateway for SCADA-Systems in Critical Infrastructures}, series = {27th International Conference on Applied Electronics (AE): 06-07 September 2022, Pilsen, CZ}, booktitle = {27th International Conference on Applied Electronics (AE): 06-07 September 2022, Pilsen, CZ}, publisher = {IEEE}, doi = {10.1109/AE54730.2022.9920070}, pages = {6}, abstract = {Supervisory Control and Data Acquisition (SCADA) systems are used to control and monitor components within the energy grid, playing a significant role in the stability of the system. As a part of critical infrastructures, components in these systems have to fulfill a variety of different requirements regarding their dependability and must also undergo strict audit procedures in order to comply with all relevant standards. This results in a slow adoption of new functionalities. Due to the emerged threat of cyberattacks against critical infrastructures, extensive security measures are needed within these systems to protect them from adversaries and ensure a stable operation. In this work, a solution is proposed to integrate extensive security measures into current systems. By deploying additional security-gateways into the communication path between two nodes, security features can be integrated transparently for the existing components. The developed security-gateway is compliant to all regulatory requirements and features an internal architecture based on the separation-of-concerns principle to increase its security and longevity. The viability of the proposed solution has been verified in different scenarios, consisting of realistic field tests, security penetration tests and various performance evaluations.}, language = {en} } @inproceedings{SchmidMottok, author = {Schmid, Michael and Mottok, J{\"u}rgen}, title = {Investigation of Scheduling Algorithms for DAG. Tasks through Simulations}, series = {ERTS 2022, 11th European Congress Embedded Real Time Systems: 1-2 June, Toulouse, France}, booktitle = {ERTS 2022, 11th European Congress Embedded Real Time Systems: 1-2 June, Toulouse, France}, pages = {9}, abstract = {In the real-time systems sector, various task models and corresponding tests exist to model and verify the schedulability of task sets on the system at hand. While those models and schedulability tests have intensively been studied from a theoretical point of view, it is hard to ma e use of them to compare the actual execution behavior of scheduling algorithms on a real system. In contrast to schedulability tests, simulators can help to investigate the performance of specific scheduling algorithms. One of the most generalized task models to describe parallel tasks is the Directed Acyclic Graph model that allows to represent tasks as a series of subtasks that depict the potentially parallel computations and precedence constraints that denote the order in which the subtasks are allowed to execute. In this paper, we investigate various scheduling algorithms for the Directed Acyclic Graph model. For that, we first recapitulate the examined scheduling algorithms in detail and point out relevant differences. Subsequently, we present the evaluation of different global and federated scheduling algorithms using fine-grained parallel tasks. To this end, we generate random Directed Acyclic Graph tasks and simulate their execution on multiprocessor systems using scheduling algorithms such as global rate-monotonic and semi-federated scheduling as well as global scheduling policies using the thread pool model.}, language = {en} } @inproceedings{GrabingerHauserMottok, author = {Grabinger, Lisa and Hauser, Florian and Mottok, J{\"u}rgen}, title = {Accessing the Presentation of Causal Graphs and an Application of Gestalt Principles with Eye Tracking}, series = {2022 IEEE International Conference on Software Analysis, Evolution and Reengineering (SANER 2022), 1st Workshop on Advances in Human-Centric Experiments in Software Engineering (HUMAN 2022): 15-18 March 2022, Honolulu, HI, USA}, booktitle = {2022 IEEE International Conference on Software Analysis, Evolution and Reengineering (SANER 2022), 1st Workshop on Advances in Human-Centric Experiments in Software Engineering (HUMAN 2022): 15-18 March 2022, Honolulu, HI, USA}, publisher = {IEEE}, doi = {10.1109/SANER53432.2022.00153}, pages = {1278 -- 1285}, abstract = {The discipline of causal inference uses so-called causal graphs to model cause and effect relations of random variables. As those graphs only encode a relation structure there is no hard rule concerning their alignment. The present paper presents a study with the aim of working out the optimal alignment of causal graphs with respect to comprehensibility and interestingness. In addition, the study examines whether the central gestalt principles of psychology apply for causal graphs. Data from 29 participants is acquired by triangulating eye tracking with a questionnaire. The results of the study suggest that causal graphs should be aligned downwards. Moreover, the gestalt principles proximity, similarity and closure are shown to hold true for causal graphs.}, language = {en} } @misc{RennerPozzobonMottok, author = {Renner, Sebastian and Pozzobon, Enrico and Mottok, J{\"u}rgen}, title = {3rd Round Ciphers Evaluation on Microcontrollers}, series = {Lightweight Cryptography Workshop (virtual): May 9-11 2022}, journal = {Lightweight Cryptography Workshop (virtual): May 9-11 2022}, publisher = {National Institute of Standards and Technology (NIST)}, address = {Gaithersburg}, language = {en} } @inproceedings{DeNiklasRooneyetal., author = {De, Sangita and Niklas, Michael and Rooney, Brian and Mottok, J{\"u}rgen and Brada, Premek}, title = {Towards Semantic model-to-model Mapping of Cross-Domain Component Interfaces for Interoperability of Vehicle Applications : An Approach towards Synergy Exploration}, series = {MDE4IoT \& ModComp 2019: Model-Driven Engineering for the Internet of Things (MDE4IoT) \& Interplay of Model-Driven and Component-Based Software Engineering (ModComp); joint proceedings of the Workshop on Model-Driven Engineering for the Internet of Things (MDE4IoT) \& of the Workshop on Interplay of Model-Driven and Component-Based Software Engineering (ModComp); co-located with the IEEE/ACM 22nd International Conference on Model Driven Engineering Languages and Systems (MODELS 2019), Munich, Germany, September 15 and 17, 2019}, booktitle = {MDE4IoT \& ModComp 2019: Model-Driven Engineering for the Internet of Things (MDE4IoT) \& Interplay of Model-Driven and Component-Based Software Engineering (ModComp); joint proceedings of the Workshop on Model-Driven Engineering for the Internet of Things (MDE4IoT) \& of the Workshop on Interplay of Model-Driven and Component-Based Software Engineering (ModComp); co-located with the IEEE/ACM 22nd International Conference on Model Driven Engineering Languages and Systems (MODELS 2019), Munich, Germany, September 15 and 17, 2019}, publisher = {RWTH Aachen}, address = {Aachen}, doi = {10.13140/RG.2.2.28765.15840}, abstract = {With the increase in demand of services in the automotive industry, automotive enterprises prefer to collaborate with other qualified cross-domain partners to provide complex automotive functions (or services), such as autonomous driving, OTA (Over The Air) vehicle update, V2X (Vehicle-to-Vehicle communication), etc. One key element in cross-domain enterprise collaboration is the mutual agreement between interfaces of software components. In this context, model-to-model mappings of software component models of heterogeneous frameworks for automotive services and to explore the synergies in their interface semantics, have become an essential factor in improving the interoperability among the automotive and other cross-domain enterprises. However, one of the challenges in achieving cross-domain component interface model-to-model mappings at an application level lies in detecting the interface semantics and the semantic relations that are conveyed in different component models in different frameworks. This paper addresses this challenge using a Model Driven Architecture (MDA) based analytical approach to explore interface semantic synergies in the cross-domain component meta-models that are used for automotive services. The approach applies manual semantic checking measurements at an application interface level to understand the meanings and relations between the different meta-model entities of cross-domain framework software components. In this research, we attempt to ensure that interface description models of software components from heterogeneous frameworks can be compared, correlated and re-used for automotive services based on semantic synergies. We have demonstrated our approach using component meta-models from cross-domain enterprises, that are used for the automotive application domain.}, language = {en} } @inproceedings{RennerPozzobonMottok, author = {Renner, Sebastian and Pozzobon, Enrico and Mottok, J{\"u}rgen}, title = {The Final Round: Benchmarking NIST LWC Ciphers on Microcontrollers}, series = {Attacks and Defenses for the Internet-of-Things, 5th International Workshop, ADIoT 2022: Copenhagen, Denmark, September 30, 2022, Revised Selected Papers}, booktitle = {Attacks and Defenses for the Internet-of-Things, 5th International Workshop, ADIoT 2022: Copenhagen, Denmark, September 30, 2022, Revised Selected Papers}, editor = {Li, Wenjuan and Furnell, Steven and Meng, Weizhi}, publisher = {Springer Nature}, address = {Cham}, isbn = {978-3-031-21311-3}, doi = {10.1007/978-3-031-21311-3_1}, pages = {1 -- 20}, abstract = {In this work, we present our benchmarking results for the ten finalist ciphers of the Lightweight Cryptography (LWC) project initiated by National Institute of Standards and Technology (NIST). We evaluate the speed and code size of various software implementations on five different platforms featuring four different architectures. Moreover, we benchmark the dynamic memory utilization of the remaining NIST LWC algorithms on one 32-bit ARM controller. We describe our test cases and methodology and provide some information regarding the design and properties of the finalists before showing and discussing our results. Altogether, we evaluated almost 300 implementations of the 3rd round candidates and pick the most appropriate and best (primary) implementation of each cipher for our comparisons. We include a variant of AES-GCM in our benchmarking in order to be able to compare the state-of-the-art to the novel LWC ciphers. Our research gives an overview over the performance of the latest software implementations of the NIST LWC finalists and shows under which circumstances which candidate is performing the best in our individual test cases. Additionally, we make all benchmarking results, the code for our test framework and every tested implementation available to the public to ensure a transparent testing process.}, language = {en} } @inproceedings{RennerPozzobonMottok, author = {Renner, Sebastian and Pozzobon, Enrico and Mottok, J{\"u}rgen}, title = {Evolving a Boolean Masked Adder Using Neuroevolution}, series = {Attacks and Defenses for the Internet-of-Things, 5th International Workshop, ADIoT 2022: Copenhagen, Denmark, September 30, 2022, Revised Selected Papers}, booktitle = {Attacks and Defenses for the Internet-of-Things, 5th International Workshop, ADIoT 2022: Copenhagen, Denmark, September 30, 2022, Revised Selected Papers}, editor = {Li, Wenjuan and Furnell, Steven and Meng, Weizhi}, publisher = {Springer Nature}, address = {Cham}, isbn = {978-3-031-21310-6}, doi = {10.1007/978-3-031-21311-3_2}, pages = {21 -- 40}, abstract = {The modular addition is a popular building block when designing lightweight ciphers. While algorithms mainly based on the addition can reach very high performance, masking their implementations results in a huge penalty. Since efficient protection against side-channel attacks is a requirement in lots of use cases, we focus on optimizing the Boolean masking of the modular addition. Contrary to recent related work, we target evolving a masked full adder instead of parts of a parallel prefix adder. We study how techniques typically found in neural network evolution and genetic algorithms can be adapted in order to help in evolving an efficiently masked adder. We customize a well-known neuroevolution algorithm, develop an optimized masked adder with our new approach and implement the ChaCha20 cipher on an ARM Cortex-M3 controller. We compare the performance of the protected neuroevolved implementation to solutions found by traditional search methods. Moreover, the leakage of our new solution is validated by a t-test conducted with a leakage simulator. We present under which circumstances our masked implementation outperforms related work and prove the feasibility of successfully using neuroevolution when searching for complex Boolean networks.}, language = {en} } @inproceedings{DeMottokBrada, author = {De, Sangita and Mottok, J{\"u}rgen and Brada, Premek}, title = {Evaluation of Semantic Interoperability of Automotive Service API Models Based on Metamodels Similarity Metrics Using a Semi-automated Approach}, series = {iCETiC 2022 : 5th International Conference on Emerging Technologies in Computing 2022: Aug 15, 2022 - Aug 16, 2022, Chester, UK}, booktitle = {iCETiC 2022 : 5th International Conference on Emerging Technologies in Computing 2022: Aug 15, 2022 - Aug 16, 2022, Chester, UK}, editor = {Miraz, M.H. and Southall, G. and Ali, Maaruf and Ware, A.}, publisher = {Springer}, address = {Cham}, doi = {10.1007/978-3-031-25161-0_2}, pages = {14 -- 28}, abstract = {In recent years, mapping of application software components' ontologies semantically emerged as a big research challenge in automotive application domain that manipulates several cross-enterprise synergy knowledge application frameworks. The same knowledge formalized by different experts in different vehicle application frameworks leads to heterogeneous representations of components' interface data. Consequently, this causes the most daunting impediment in semantic interoperability between the service components in cooperative automotive systems. From a modeling perspective, in the absence of standardized domain-based unified modeling techniques, the orchestration and resolution of semantic data interoperability between various vehicle application frameworks' components' interface models remain a challenge. However, this challenge could be addressed using ontological metamodeling by specifying semantic associations between components' interface model concepts based on the domain knowledge. Apart from the semantic mapping of interface ontological metamodels, this work also defines quality metrics to determine the degree of semantic alignment achieved between the various interface ontologies. Additionally, to reduce development time and cost towards semantic interoperability, this work proposes a semi-automated plugin tool for the applicability of the evaluated quality metrics to semantic mapping of real-world components' interface models.}, language = {en} } @inproceedings{GrabingerHauserMottok, author = {Grabinger, Lisa and Hauser, Florian and Mottok, J{\"u}rgen}, title = {Evaluating Graph-based Modeling Languages}, series = {Proceedings of the 5th European Conference on Software Engineering Education, Seeon/Germany, June 19 - 21, 2023}, booktitle = {Proceedings of the 5th European Conference on Software Engineering Education, Seeon/Germany, June 19 - 21, 2023}, publisher = {ACM}, isbn = {978-1-4503-9956-2}, doi = {10.1145/3593663.3593664}, pages = {120 -- 129}, abstract = {As humans, we tend to use models to describe reality. Modeling languages provide the formal frameworks for creating such models. Usually, the graphical design of individual model elements is based on subjective decisions; their suitability is determined at most by the prevalence of the modeling language. With other words: there is no objective way to compare different designs of model elements. The present paper addresses this issue: it introduces a systematic approach for evaluating the elements of graph-based modeling languages comprising 14 criteria - derived from standards, usability analyses, or the design theories 'Physics of Notations' and 'Cognitive Dimensions of Notations'. The criteria come with measurement procedures and evaluation schemes based on reasoning, eye tracking, and questioning. The developed approach is demonstrated with a specific use case: three distinct sets of node elements for causal graphs are evaluated in an eye tracking study with 41 subjects.}, language = {en} }