@inproceedings{ReuterKuhnMottok, author = {Reuter, Rebecca and Kuhn, Martina and Mottok, J{\"u}rgen}, title = {A Two-Sided Approach of Applying Software Engineering Perspectives in Higher Education}, series = {Teaching and Learning in a Digital World, ICL 2017, Proceedings of the 20th International Conference on Interactive Collaborative Learning - Volume 1}, booktitle = {Teaching and Learning in a Digital World, ICL 2017, Proceedings of the 20th International Conference on Interactive Collaborative Learning - Volume 1}, pages = {460 -- 467}, language = {en} } @techreport{SoskaMottok, author = {Soska, Alexander and Mottok, J{\"u}rgen}, title = {An Experimental Card Game for Software Testing}, series = {Forschungsbericht 2017 der Ostbayersichen Technischen Hochschule Regensburg}, journal = {Forschungsbericht 2017 der Ostbayersichen Technischen Hochschule Regensburg}, editor = {Baier, Wolfgang}, address = {Regensburg}, organization = {Ostbayerische Technische Hochschule Regensburg}, language = {en} } @inproceedings{KampmannMottok, author = {Kampmann, Matthias and Mottok, J{\"u}rgen}, title = {A 'laboratory' as an approach to foster writing skills at software engineering studies learning software engineering is easier when writing courses are directly dpplied to lecture's content and the problems and examples enrolled in}, series = {2018 IEEE Global Engineering Education Conference, EDUCON 2018, Santa Cruz de Teneriffe, Spanien}, booktitle = {2018 IEEE Global Engineering Education Conference, EDUCON 2018, Santa Cruz de Teneriffe, Spanien}, doi = {10.1109/EDUCON.2018.8363326}, pages = {900 -- 908}, abstract = {Writing, with no doubt, is besides reading a core competency which allows us to "exploit" knowledge in general. It also makes possible the exploration of software engineering's core issues. Especially within this context it is necessary to master the reading of complex texts as well as to be able to write in an appropriate academic expression. With regard to studies in software engineering this seems to be obvious, but in fact the opposite is the reality. Therefore measures to improve these skills seemed to be necessarily applied. At the Ostbayerische Technische Hochschule (OTH, University of Applied Sciences, Regensburg) a new format, the so called c*lab, was installed during the winter semester 2017. This was a course which followed the principle of "Writing Across the Curriculum" (WAC). Organized parallel to a lecture of learning how to program the language C, and addressing students of the first semester, the course was a complete voluntary offer in addition to the general standard courses and lectures of the faculty. Students who participated not only reflected on C and its principles, nor only on writing as a self purpose, but they also learned to express technical thoughts and ideas by the use of didactic methods. The idea to transfer also basic LTeX concepts to write a paper based on the IEEE bare_conf.tex-template were also planned. The course followed the idea of student's-centred learning. This paper presents the main structure, goals, and means of the c*lab, and the theory behind. It also embeds the course within the horizon of experiences of teaching writing skills at the Laboratory for Safe and Secure Systems (LaS 3 ) at the faculty of electronic and information engineering at the OTH Regensburg. First experiences have shown that participants increase writing skills and their idea of the importance of writing.}, language = {en} } @inproceedings{OsinskiMottok, author = {Osinski, Lukas and Mottok, J{\"u}rgen}, title = {Control Flow Errors: A Discussion of Different Injection Strategies}, series = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, booktitle = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, pages = {1 -- 7}, abstract = {Among the available dependability assessment techniques, fault injection (FI) is widely adopted and strongly recommended by safety standards for the validation that functional and technical safety mechanisms are implemented correctly and effectively. The main challenge in fault injection assessments is the increasing complexity of system-on-chips as well as the increasing size of memory, which leads to enormous efforts to test every possible fault introduced to the system. Therefore, a number of publicly available fault injection frameworks utilize fault space pruning techniques to reduce the overall fault space and consequently the overall experiment duration. Most of the fault space pruning techniques mainly discuss the reduction of the number of data errors which have to be injected into registers and memory locations. However, control flow errors represent a further domain of possible errors on the application level. Usually for the evaluation of effectiveness of fault tolerance mechanisms against data errors, a single fault assumption at microarchitectural level (e.g. bit-flips) is assumed. In most cases, this assumption is equivalently applied to the program counter to investigate possible control flow errors. Due to this approach, the error space is consciously or unconsciously reduced to the possible erroneous jump targets that can be reached by a specific set of bit-flips in the program counter at a specified time during the program execution. This approach is considered valid regarding the corresponding fault assumption, but leads to negative effects on the significance of the injection and the resulting effectiveness of the tested fault tolerance mechanism. In this paper, we discuss different strategies for the analysis and injection of control flow errors and the resulting differences by considering the single fault assumption at microarchitectural and application level.}, language = {en} } @inproceedings{LaloWeberSaileretal., author = {Lalo, Erjola and Weber, Raphael and Sailer, Andreas and Mottok, J{\"u}rgen and Siemers, Christian}, title = {On Solving Task Allocation and Schedule Generation for Time-Triggered LET Systems using Constraint Programming}, series = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, booktitle = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, pages = {1 -- 8}, abstract = {The amount of safety-critical embedded systems in automotive development is heavily growing. Ensuring their reliability not only increases the complexity of functions but also requires determinism at design and execution time, which is considerably challenging to fulfill and verify for multi-core processors. The Logical Execution Time (LET) is recently recognized in automotive industry as an approach for ensuring deterministic functional behavior. However, to decrease the manual design effort and time for deploying such complex systems to multi-core platforms and for ensuring their strict timing and safety requirements, automatic solutions are needed. This work presents a solution for allocating tasks to multi-core processors and generating a time-triggered schedule for embedded systems considering safety, timing, and LET semantics. The approach we propose solves both challenges by defining them as a Constraint Satisfaction Problem (CSP). To examine our CSP formulation, we use MiniZinc, which is a solver-independent constraint modeling language that can employ a variety of solvers. In a case study, we explore optimizations of an industrial system that are enabled by scheduling and task allocation design decisions. Further, the performance of the proposed solutions is evaluated based on large set of synthetically generated system models.}, language = {en} } @inproceedings{SchmidLangerOsinskietal., author = {Schmid, Michael and Langer, Tobias and Osinski, Lukas and Mottok, J{\"u}rgen}, title = {Parallel Active Object Pattern}, series = {31th International Conference on Architecture of Computing Systems, ARCS Workshop 2018,9-12 April 2018, Braunschweig, Germany}, booktitle = {31th International Conference on Architecture of Computing Systems, ARCS Workshop 2018,9-12 April 2018, Braunschweig, Germany}, isbn = {978-3-8007-4559-3}, abstract = {With parallel applications becoming more and more popular even in real-time systems, the demand for safe and easyto- use software libraries and frameworks for parallel and concurrent computations is growing immensely. These frameworks usually provide an implementation for different sets of software patterns. A very well known software pattern for concurrency is the Active Object pattern, that allows various threads to have synchronized access to an object in question. This paper presents the Parallel Active Object pattern, which extends the common Active Object pattern to support the use of objects, whose computations are profoundly enhanced by a parallel execution. Furthermore, a C++ software framework is introduced, which implements the Parallel Active Object pattern and thus provides the possibility of using task or data parallel patterns, for example Map, Reduce and Divide-and-Conquer, on the active object's calculations. The proposed framework is evaluated against two other popular libraries, namely OpenMP and Intel Threading Building Blocks. Through utilization of the C++11 standard and template classes a simple user interface is provided, which abstracts the distribution of workloads among the worker threads. By making use of the C++ Standard Template Library the framework can easily be ported to embedded systems and by extending the pattern through real-time capabilities, which ensure a timely and reliable execution of the method requests, the intention of providing the framework for time critical environments is also targeted in the future.}, language = {en} } @inproceedings{NagengastOsinskiMottok, author = {Nagengast, Christian and Osinski, Lukas and Mottok, J{\"u}rgen}, title = {Synchronization Techniques for Parallel Redundant Execution of Applications}, series = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, booktitle = {32nd International Conference on Architecture of Computing Systems, ARCS Workshop 2019, 20-21 May 2019, Copenhagen, Denmark}, publisher = {IEEE}, pages = {1 -- 8}, abstract = {In fault tolerant systems, applications are replicated and executed to enable error detection and recovery. If one replica application fails, another is able to take its place and provide the correct results. This concept can benefit from parallel execution on separate execution units. The rise of multicore platforms supports the development of parallel software, by providing the adequate hardware. However, this raises challenges regarding the synchronization of the redundant strings of execution. Replica determinism means that given the same input, identical programs provide the same output. To ensure replica determinism, requirements regarding the synchronization can be split in two domains: data and time. This paper examines the state of the art of synchronization techniques for parallel replicated execution in the context of fault tolerant systems. We analyze the requirements regarding synchronization within the time and data domain and compare different concepts of hardware (multicore, multiprocessor and multi-PCB) and software (processes, threads).}, language = {en} } @inproceedings{OsinskiMottok, author = {Osinski, Lukas and Mottok, J{\"u}rgen}, title = {A Multicore Fault Tolerance Approach Based on Coded Processing}, series = {Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France}, booktitle = {Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France}, abstract = {Development trends for computing platforms moved from increasing the frequency of a single processor to increasing the parallelism with multiple cores on the same die. Multiple cores have strong potential to support cost-efficient fault tolerance due to their inherent spatial redundancy. This work makes a step towards software-only fault tolerance in the presence of permanent and transient hardware faults. Our approach utilizes software-based spatial triple modular redundancy and coded processing on a shared memory multi-core controller. We evaluate our approach on an Infineon AURIX TriBoard TC277 and provide experimental evidence for error resistance by fault injection campaigns with an iSystem iC5000 On-chip Analyzer.}, language = {en} } @inproceedings{MottokReichenberger, author = {Mottok, J{\"u}rgen and Reichenberger, Marcus}, title = {Use of Static Analysis and Coding Guidelines in embedded Systems Software}, series = {1st Applied Research Conference, ARC 2019, 8 July 2019, Regensburg}, booktitle = {1st Applied Research Conference, ARC 2019, 8 July 2019, Regensburg}, publisher = {Pro BUSINESS}, isbn = {978-3-96409-182-6}, pages = {571 -- 578}, language = {en} } @inproceedings{OsinskiMottok, author = {Osinski, Lukas and Mottok, J{\"u}rgen}, title = {Das FORMUS³IC Forschungsvorhaben im Verbund - Vom Stand der Technik zu neuen Entwicklungen}, series = {Embedded Software Engineering Kongress (ESE 2018), 3.-7.12.2018, Sindelfingen, Tagungsband}, booktitle = {Embedded Software Engineering Kongress (ESE 2018), 3.-7.12.2018, Sindelfingen, Tagungsband}, language = {de} } @inproceedings{ReuterHauserGoldVeerkampetal., author = {Reuter, Rebecca and Hauser, Florian and Gold-Veerkamp, Carolin and Stark, Theresa and Kis, Juliane and Mottok, J{\"u}rgen and Abke, J{\"o}rg and Meyer, Dany}, title = {Towards the construction of a questionnaire for the identification of learning obstacles}, series = {2018 IEEE Global Engineering Education Conference (EDUCON 2018), 17-20 April, 2018, Santa Cruz de Tenerife, Spain}, booktitle = {2018 IEEE Global Engineering Education Conference (EDUCON 2018), 17-20 April, 2018, Santa Cruz de Tenerife, Spain}, doi = {10.1109/EDUCON.2018.8363266}, pages = {457 -- 466}, abstract = {This paper deals with the identification of learning ob-stacles using the questionnaire method. Therefore, two iterations were proceeded: The first one was part of a survey that was carried out at four lo-cations at universities of applied sciences. We asked students about obstructive facts in general providing items for five learning ob-stacle dimensions that were set up before; emotional/motivational, epistemological/cognitive, didactical, resource-related and meta-cognitive learning obstacle dimensions. After the general part, we asked them to answer the same question, but in relation to the - in their opinion - most difficult learning content. With this question, we aim to get indications regarding to epistemological obstacles. In a second step, we used the "Motivated Strategies for Learning Questionnaire", which was developed by Pintrich [1] as a basis to develop a questionnaire that extracts learning obstacles. In its original version, the "Motivated Strategies for Learning Question-naire" was intended to measure students' learning strategies, but, as the obstacle dimensions were partly derived from learning strategy classification, we chose this already validated question-naire [2]. Within this iteration, we could confirm a five-factor structure of the questionnaire that could be mapped to the five be-fore set learning obstacle dimensions.}, language = {en} } @inproceedings{HauserReuterGruberetal., author = {Hauser, Florian and Reuter, Rebecca and Gruber, Hans and Mottok, J{\"u}rgen}, title = {Research competence: Modification of a questionnaire to measure research competence at universities of applied sciences}, series = {IEEE Global Engineering Education Conference (EDUCON), 17-20 April 2018, Santa Cruz de Tenerife, Spain}, booktitle = {IEEE Global Engineering Education Conference (EDUCON), 17-20 April 2018, Santa Cruz de Tenerife, Spain}, doi = {10.1109/EDUCON.2018.8363216}, pages = {109 -- 117}, abstract = {This paper deals with the validation and modification of the German questionnaire "F-Komp". In its original version, it was intended to measure university students' research competences. In the beginning of this study, there were only a few tools available which were reliable. For the purposes of this study, they were not suitable. At the same time, there was no validated version of the F-Komp available, which made the whole validation process for further usage necessary. This questionnaire is based on a structure, which consist of different skills and knowledge and is focused on measuring research competence in general. The validation and modification of the F-Komp is therefore the aim of our contribution as well as a revised version of the questionnaire. We proceeded an explorative factor and a reliability analysis to do a general evaluation of the tool. Some modifications were done in the questionnaire to make it more suitable to the requirements of technical oriented universities of applied sciences [5]. Our revised version is slightly longer and contains several items to gather data about the participants demographics. The modified questionnaire is based on a more appropriate factor structure. This structure is more practically oriented and pays attention to ethical issues. In future cases, this questionnaire will be used in research oriented courses to measure students' progress in acquiring the knowledge and methods which are necessary to perform as a scientist in different research areas.}, language = {en} } @inproceedings{SchmidMottok, author = {Schmid, Michael and Mottok, J{\"u}rgen}, title = {Asynchronous Critical Sections in Real-Time Multiprocessor Systems}, series = {Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings}, booktitle = {Architecture of Computing Systems - ARCS 2019, 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings}, editor = {Schoeberl, Martin and Hochberger, Christian and Uhrig, Sascha and Brehm, J{\"u}rgen and Pionteck, Thilo}, publisher = {Springer}, address = {Cham}, doi = {10.1007/978-3-030-18656-2_5}, pages = {56 -- 67}, abstract = {Sharing data across multiple tasks in multiprocessor systems has intensively been studied in the past decades. Various synchronization protocols, the most well-known being the Priority Inheritance Protocol or the Priority Ceiling Protocol, have been established and analyzed so that blocking times of tasks waiting to access a shared resource can be upper bounded. To the best of our knowledge, all of these protocols share one commonality: Tasks that want to enter a critical section, that is already being executed by another task, immediately get blocked. In this paper, we introduce the Asynchronous Priority Ceiling Protocol (A-PCP), which makes use of aperiodic servers to execute the critical sections asynchronously, while the calling task can continue its work on non-critical section code. For this protocol, we provide a worst-case response time analysis of the asynchronous computations, as well as necessary and sufficient conditions for a feasibility analysis of a set of periodic tasks using the proposed synchronization model on a system that preemptively schedules the tasks under the rate-monotonic priority assignment.}, language = {en} } @book{WeilkiensHuwaldtMottoketal., author = {Weilkiens, Tim and Huwaldt, Alexander and Mottok, J{\"u}rgen and Roth, Stephan and Willert, Andreas}, title = {Modellbasierte Softwareentwicklung f{\"u}r eingebettete Systeme verstehen und anwenden}, publisher = {dpunkt.Verlag}, address = {Heidelberg}, isbn = {978-3-86490-524-7}, abstract = {Die Beherrschung von Komplexit{\"a}t ist eine der gr{\"o}ßten Engineering-Herausforderungen des 21. Jahrhunderts. Themen wie das „Internet der Dinge" (IoT) und „Industrie 4.0" beschleunigen diesen Trend. Die modellgetriebene Entwicklung leistet einen entscheidenden Beitrag, um diesen Herausforderungen erfolgreich begegnen zu k{\"o}nnen. Die Autoren geben einen fundierten Einstieg und praxisorientierten {\"U}berblick {\"u}ber die Modellierung von Software f{\"u}r eingebettete Systeme von den Anforderungen {\"u}ber die Architektur bis zum Design, der Codegenerierung und dem Testen. F{\"u}r jede Phase werden Paradigmen, Methoden, Techniken und Werkzeuge beschrieben und ihre praktische Anwendung in den Vordergrund gestellt. Dar{\"u}ber hinaus wird auf die Integration von Werkzeugen, funktionale Sicherheit und Metamodellierung eingegangen sowie die Einf{\"u}hrung eines modellbasierten Ansatzes in einer Organisation und die Notwendigkeit zum lebenslangen Lernen erl{\"a}utert. Der Leser erf{\"a}hrt in diesem Buch, wie ein modellbasiertes Vorgehen nutzbringend in der Praxis f{\"u}r die Softwareentwicklung eingesetzt wird. Das Vorgehen wird unabh{\"a}ngig von Modellierungswerkzeugen vorgestellt. Zahlreiche Beispiele - exemplarisch auch auf Basis konkreter Werkzeuge - helfen bei der praktischen Umsetzung.}, language = {de} }