TY - CONF A1 - Osinski, Lukas A1 - Mottok, Jürgen T1 - A Multicore Fault Tolerance Approach Based on Coded Processing T2 - Embedded Real-Time Software and Systems Conference (ERST²), Jan 2018, Toulouse/France N2 - Development trends for computing platforms moved from increasing the frequency of a single processor to increasing the parallelism with multiple cores on the same die. Multiple cores have strong potential to support cost-efficient fault tolerance due to their inherent spatial redundancy. This work makes a step towards software-only fault tolerance in the presence of permanent and transient hardware faults. Our approach utilizes software-based spatial triple modular redundancy and coded processing on a shared memory multi-core controller. We evaluate our approach on an Infineon AURIX TriBoard TC277 and provide experimental evidence for error resistance by fault injection campaigns with an iSystem iC5000 On-chip Analyzer. Y1 - 2021 UR - https://opus4.kobv.de/opus4-oth-regensburg/frontdoor/index/index/docId/1299 UR - https://hal.archives-ouvertes.fr/hal-02156233 ER -