Refine
Document Type
- conference proceeding (article) (24)
- Article (2)
Language
- English (26) (remove)
Publication reviewed
- begutachtet (26)
Keywords
- ARCHIVE (5)
- LILIPUT (5)
- DrGaN (3)
- MEDAL (3)
- Sinterpack (3)
- GaNmsPEBB (2)
- MShunt2 (2)
- begutachtet (1)
- empsABB (1)
Institute
The requirements for power electronic assemblies are continuously increasing and are mainly driven by costs, functionality, and reliability. A novel and promising approach is the embedding of power semiconductor devices into PCB-materials. Benefits are the reduction in size and volume of the system. The embedding of semiconductor devices provides a high degree of miniaturization. Also printed circuit board technology in combination with the use of established processes apparently has the potential for low-cost manufacturing. Further functional advantages are the possibility to place passive components and peripheral circuits close to the switching devices, enabling shorter commutating paths. In consequence, they are expected to produce smaller parasitic effects caused by the package, which results in higher possible frequencies and reduced conduction and switching losses. However, there is a significant challenge regarding package design, processing, and materials selection to make use of this potential even at high operating temperatures. To address only one aspect, generally used materials, like epoxy-glass-substrates (FR4) and solder alloys like PbSnAg or SAC are not suitable for temperatures above 150 °C. This work will introduce and evaluate a concept for double-side Ag-sintered semiconductor chips, which are embedded between two organic high-temperature PCBs. A proof-of-concept will be presented by setting up a 30 kW (600 V, 50 A) power package as a demonstrator.
Due to an increasing demand in miniaturization of power converter, power loss densities increase significantly, which makes their thermal management difficult. One way to face this challenge is PCB embedding of semiconductors. This approach provides a much shorter thermal path from semiconductor to a coolant, than with a usual DBC-based power module. Still, a typically liquid cooling heat exchanger, which is connected to the power module forms a main part of the overall thermal resistance. This paper presents a novel design of a PCB embedded power module with a small size heat exchanger. To meet the requirements of the targeted application a dielectric coolant was used. A parametric study was performed to find out the most suitable cooling concept. Jet impingement on an optimized cooling surface with an increased area is persecuted. The heat exchanger design is described and the thermal performance is evaluated by CFD-simulations. The overall thermal resistance for the IGBT was calculated to Rth junction-coolant = 0.52 K/W. For comparison a reference DBC-based power module on a standard cold plate is considered. Its thermal resistance was Rth junction coolant = 1.03 K/W which is almost two times higher than the embedded version with direct cooling.
The increasing demand for highly compact power converters in many applications such as on-board power supplies and motor drives leads to high power loss densities. Typically, thermal management components and filters take the biggest part of the converter volume. To reduce the size, embedding technology can be used. Embedding of power semiconductors enhances the electrical performance of such devices due to reduced interconnection length. This leads to lower inductance which enables higher switching frequencies and allows more compact filter elements [1]. Direct cooling strategies pursue ways to enhance heat transfer to a coolant while reduce the heat sink size. Products like the “Danfoss ShowerPower”[2] and “Infineon Hybrid Pack”[3] show examples where cooling structures are attached directly on the backside of the power module. By omitting the thermal interface between power module and heat sink, the thermal resistance is significantly reduced. Due to superior thermal properties, water-glycol is usually applied as coolant. However, using a dielectric coolant enables some unique benefits: First, no electric insulation layer to coolant is required, which reduces the thermal resistance, second, corrosion problems are avoided, as dielectric coolants are typically inert, and third, the system stays safe for users in case of coolant leakage. Our approach combines these strategies to create an ultra-compact PCB embedded power module with integrated dielectric cooling. This paper is focused on the experimental thermal performance evaluation of the developed heat exchangers. It continues the theoretical work, which was presented as paper at the CIPS 2018 [5].
The ever-increasing switching speed of semiconductor devices requires a precise measurement of steep current transients. The M-shunt concept offers high signal fidelity, good cooling, and simple manufacturing. Depending on the resistive material used, temperature as well as skin and proximity effects impede static and dynamic measurements to a different degree. A step forward has been derived from the ideal coaxial shunt, so far, a purely theoretical concept, which is hardly producible due to its sophisticated structure. By transferring this concept to the M-shunt structure with its improved PCB manufacturing technologies it can now be realised in practice. Nevertheless, the calibration and the correct degree of delay compensation remain challenging and are investigated more closely within this paper. Furthermore, it will be discussed why the conventional method of bandwidth determination doesn't work for the M-shunt structure. In addition to the low inductance introduced into the load circuit, the high bandwidth of the shunts could be demonstrated, as well as the possibility to extend this by design rules. Supplemented by the advantages of the lower load inductance, the M-shunt will become the tool of choice for characterising switching transients at least up to 200 MHz required bandwidth eventually. Although it is obviously difficult to improve the 3 dB bandwidth with suitable design rules, the range of nearly entirely unaffected measurement frequencies (e.g. < 1 dB) can be significantly extended by limited coupling. For even higher frequencies, measurements of the current M-shunt models, as well as for the coaxial shunts used as reference, should be corrected by post processing to get precise measurement results.
Gallium nitride transistors have a smaller die area compared to silicon-based devices, which can lead to thermal challenges in high current density applications. Therefore, thermally optimized packages with a high heat spreading capability in combination with small parasitic are necessary. This work investigates the thermal performance a 7 mΩ, 100 V GaN HEMT in a thermally optimized single chip package with integrated RTD and compares it to the commercial counterpart. The thermal optimized package shows a significantly better transient thermal impedance resulting in a static thermal resistance of 3.1 K/W, which is a 20 % reduction in comparison to the COTS package. The integrated RTD trace has a relative reaction time of 590 ms, which is 30-fold slower in comparison to the junction temperature. To show the identical electrical behavior, although the single chip package is larger, it is compared with the commercial off-the-shelf package and a 5 mΩ, 100 V GaN single chip package in a 300 kHz, 48 V buck converter. Both 7 mΩ versions have identical efficiencies of ≈97.5 % up to 50 A output current, slightly outperforming the 5 mΩ GaN transistor. With its combination of improved thermal characteristics and lowinductance, the thermally optimized package of the GaN device offers more degrees of freedom in the design of power converter to exploit trade-offs between longer lifetime, higher temperature operation and power density. Index Terms—gallium nitride, high electron mobility transistor, (thermal) performance evaluation, thermally optimized package, DC/DC converter, high current application, parallelization
In this work an approach for a direct experimental comparison of the application-oriented performance between two high current GaN DC/DC converters based on 7mΩ, 100V GaN HEMTs in a commercial off-the-shelf top-cooled package and 5mΩ, 100V GaN HEMTs embedded in a thermally-optimized single-chip package is given. The two packaging versions are compared by a maximally identical implementation of the power and gate loops in a 48V, 300kHz buck converter with two parallel GaN HEMTs. In the single-chip package the die is directly mounted on a 12×6mm 2 copper-heat spreader offering a significantly lower thermal resistance to heatsink (1.69KW −1 ) in comparison to the commercial off-the-shelf version (2.45KW −1 ). For a direct benchmark, the COTS-based converter has an identical power-loop to the SCP-version with a novel gate-drive concept. Both versions have an efficiency of 96.8% at 65A output current (output power: 1.5kW), while the commercial off-the-shelf version has a better efficiency for lower currents, due to its better hard-switching Figure-of-Merits and therefore lower switching losses and reaches an output current of up to 80A (output power: 1.75kW). A detailed analytical loss breakdown for the different transistors in dependence of the temperature and output current is given to proof the measured current point, where the efficiencies of both converters are identical, since the higher switching losses of the SCP version are compensated by lower conduction losses at higher currents and temperatures compared to the smaller COTS transistor. Finally, an outlook on further improvements for reaching higher output currents and potential converters for a more fair comparison of different thermally optimized SMD packages are given.