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Thermisch und elektrisch optimiertes Leiterplatten-Prepackage für 100V/100A GaN Leistungshalbleiter
(2021)
In dieser Arbeit wird ein Integrationskonzept für GaN Leistungshalbleiter in Leiterplattentechnologie vorgestellt. Das
Konzept beruht auf thermisch optimierten Prepackages mit integrierten Temperatursensoren, die in Leiterplattenembeddingtechnologie hergestellt werden. Durch ein asymmetrisches Layout wird ein niederinduktiver Kommutierungskreis ermöglicht. Funktionsmuster mit einem 100 V / 120 A GaN HEMT wurden aufgebaut und erprobt. Die Bauteile sind elektrisch voll funktionsfähig und weisen einen thermischen Widerstand von 3,34 K/W auf. Dieser Wert liegt 35% unter dem eines kommerziellen Referenzbauteils.
To make the full performance of the intrinsic 100 V, 5 mΩ gallium nitride transistors available on system level, in this work an asymmetrical & thermally optimized PCB embedded single chip package with integrated resistance thermometer, high temperature capability and a thermal resistance Rth,j−hs of 3.3 K W−1 is characterized in a 48 V to 24 V 300 kHz mild-hybrid DC/DC operation with two paralleled chips in each low- (LS) and high-side (HS). The transistors are mounted on a 4-layer multilayer PCB with 1 mm copper inlays to achieve a high current capability, while allowing narrow logic traces on the same PCB. The designed converter is achieving a light load efficiency of ≥99 % and an efficiency of 97 % at 60 A output current and ≈1.3 kW output power in a 48 V to 24 V 300 kHz buck-converter operation. The on-board temperature readout circuit and the phase output current sensor offer the possibility to extend the GaN transistors to an intelligent power module by the compact and simple sensors.
This paper proposes an asymmetric Single-Chip-Prepackage (SCP) with thick Cu substrate for the optimum electrical and thermal performance of the GaN-HEMT devices. Additionally, the package features a Ni-based integrated thermistor. Laboratory demonstrators have been fabricated using PCB embedding technology. A full electrical characterization of the packaged device indicates full functionality. The temperature coefficient of the integrated temperature sensor is 𝛼 = 0.00541 /𝐾. Thermal characterization of the SCP shows a junction to heatsink thermal resistance Rth,jh = 3.34 K/W, which is 36 % less than the commercial reference device. A silver sinter based assembly process for system integration of SCP is introduced in view of a planar thermal interface. In a 300 kHz 48 V to 24 V buck-converter operation with 60 Arms output current, a 98% efficiency is achieved.