Application-Oriented Characterization of Thermally Optimized, Asymmetrical Single Chip Packages for 100 V GaN HEMTs
- Gallium nitride transistors have a smaller die area compared to silicon-based devices, which can lead to thermal challenges in high current density applications. Therefore, thermally optimized packages with a high heat spreading capability in combination with small parasitic are necessary. This work investigates the thermal performance a 7 mΩ, 100 V GaN HEMT in a thermally optimized single chip package with integrated RTD and compares it to the commercial counterpart. The thermal optimized package shows a significantly better transient thermal impedance resulting in a static thermal resistance of 3.1 K/W, which is a 20 % reduction in comparison to the COTS package. The integrated RTD trace has a relative reaction time of 590 ms, which is 30-fold slower in comparison to the junction temperature. To show the identical electrical behavior, although the single chip package is larger, it is compared with the commercial off-the-shelf package and a 5 mΩ, 100 V GaN single chip package in a 300 kHz, 48 V buck converter. Both 7 mΩ versions haveGallium nitride transistors have a smaller die area compared to silicon-based devices, which can lead to thermal challenges in high current density applications. Therefore, thermally optimized packages with a high heat spreading capability in combination with small parasitic are necessary. This work investigates the thermal performance a 7 mΩ, 100 V GaN HEMT in a thermally optimized single chip package with integrated RTD and compares it to the commercial counterpart. The thermal optimized package shows a significantly better transient thermal impedance resulting in a static thermal resistance of 3.1 K/W, which is a 20 % reduction in comparison to the COTS package. The integrated RTD trace has a relative reaction time of 590 ms, which is 30-fold slower in comparison to the junction temperature. To show the identical electrical behavior, although the single chip package is larger, it is compared with the commercial off-the-shelf package and a 5 mΩ, 100 V GaN single chip package in a 300 kHz, 48 V buck converter. Both 7 mΩ versions have identical efficiencies of ≈97.5 % up to 50 A output current, slightly outperforming the 5 mΩ GaN transistor. With its combination of improved thermal characteristics and lowinductance, the thermally optimized package of the GaN device offers more degrees of freedom in the design of power converter to exploit trade-offs between longer lifetime, higher temperature operation and power density. Index Terms—gallium nitride, high electron mobility transistor, (thermal) performance evaluation, thermally optimized package, DC/DC converter, high current application, parallelization…
Author: | Dominik Koch, Vladimir Polezhaev, Ankit Bhushan Sharma, Kevin Munoz Barón, Till HuesgenORCiD, Ingmar Kallfass |
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DOI: | https://doi.org/10.1109/ISPSD57135.2023.10147544 |
Identifier: | 979-8-3503-9682-9 OPAC HS OPAC extern |
Identifier: | 979-8-3503-9683-6 OPAC HS OPAC extern |
Parent Title (English): | Proceedings of the 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD) |
Publisher: | IEEE |
Place of publication: | Piscataway |
Document Type: | conference proceeding (article) |
Conference: | 35st International Symposium on Power Semiconductor Devices & ICs (ISPSD) , May 28- June 1, Hong Kong, China |
Language: | English |
Date of Publication (online): | 2023/06/14 |
Year of first Publication: | 2023 |
Tag: | GaNmsPEBB |
Volume: | 2023 |
Number of pages: | 4 Seiten |
First Page: | 48 |
Last Page: | 51 |
Institutes: | Fakultät Elektrotechnik |
Dewey Decimal Classification: | 6 Technik, Medizin, angewandte Wissenschaften |
Research focus: | FSP1: Energie |
FSP3: Produktion | |
Publication Lists: | Huesgen, Till |
Sharma, Ankit Bhushan | |
Polezhaev, Vladimir | |
Publication reviewed: | begutachtet |
Release Date: | 2023/11/24 |