TY - CONF A1 - Huesgen, Till A1 - Polezhaev, Vladimir A1 - Sharma, Ankit Bhushan A1 - Liu, Chunlei A1 - Montazerian, Mohammadhossein A1 - Stadler, Patrick A1 - Pavliček, Niko A1 - Salvatore, Giovanni T1 - Reliability Screening of a Hybrid DBC/PCB power semiconductor prepackage T2 - 2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC) N2 - PCB embedding in combination with direct-bonded copper (DBC) substrates is an attractive approach for packaging of power semiconductors facilitating low-inductive designs while relying on a proven insulating material. However, the CTE mismatch of these materials could cause reliability issues. This study presents an initial reliability screening using simple IGBT prepackages with alumina-based DBC as test vehicles. After -40/150 °C temperature cycles, fracture of the substrate and the chip is observed, resulting in an increased on-state resistance. Literature data suggest that the substrate failure is independent from the embedding. To gain a deeper understanding of the limitations of the technology, further research with optimized DBC substrates is required. KW - empsABB Y1 - 2021 UR - https://opus4.kobv.de/opus4-hs-kempten/frontdoor/index/index/docId/1006 SN - 978-0-9568086-7-7 SN - 978-1-6654-2368-7 SP - 1 EP - 5 PB - IEEE ER -