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Over the last decades, parallel computing has gained more and more attention not only in science, but also in scientific research and industry. The reason for this purpose is that common industrial applications become increasingly performance-demanding. Conventional single-core designs cannot meet the performance requirements any longer because raising the clock frequency is not an option due to reaching technological limitations. As a consequence, the efficient use of (embedded) multi-core CPUs and many-core platforms has become inevitable. 3D surface analysis of objects using white light interferometry presents one of such challenging applications. The goal of this article is to get an impression which absolute run times and which speed-up for an established and parallelized white light interferometry preprocessing algorithm, called Contrast Method, which is possible on an embedded system that works without any operating system. Currently, multi- and many-core systems are still not pervasive architectures in the embedded domain, even if state-of-the-art technologies allow such systems. In order to gain more insights into possible benefits, we decided to use a virtual environment that is able to simulate embedded multi-core as well as many-core systems and that enables running real application code on the designed system. The results show that a significant reduction of the execution times, and thus a significant speed-up, is possible when using a many-core platform, instead of a design that only implements one single core. The algorithm was parallelized for getting maximum performance of the many-core design.
Modeling of resistive RAMs (RRAMs) is a herculean task due to its non-linearity. While the exigent need for a model has motivated research groups to formulate realistic models, the diversity in RRAMs’ characteristics has created a gap between model developers and model users. This paper bridges the gap by proposing an algorithm by which the parameters of a model are tuned to specific RRAMs. To this end, a physics-based compact model was chosen due to its flexibility, and the proposed algorithm was used to exactly fit the model to different RRAMs, which differed greatly in their material composition and switching behavior. Furthermore, the model was extended to simulate multiple low resistance states (LRS), which is a vital focus of research to increase memory density in RRAMs. The ability of the model to simulate the switching from a high resistance state to multiple LRS was verified by measurements on 1T-1R cells.
Many applications in scientific computing require solving one or more partial differential equations
(PDEs). For this task, solvers from the class of multigrid methods are known to be amongst the most efficient. An optimal implementation, however, is highly dependent on the specific problem as well as the target hardware. As energy efficiency is a big topic in today's computing centers, energy-efficient platforms such as ARM-based clusters are actively researched. In this work, we present a domain-specific approach, starting with the problem formulation in a domain-specific language (DSL), down to code generation targeting a variety of systems including embedded architectures. Furthermore, we present an approach to simulate embedded architectures to achieve an optimal hardware/software co-design, i.e., an optimal composition of software and hardware modifications. In this context, we use a virtual environment (OVP) that enables the adaptation of multicore models and their simulation in an efficient way. Our approach shows that execution time prediction for ARM-based platforms is possible and feasible but has to be enhanced with more detailed cache and memory models. We substantiate our claims by providing results for the performance prediction of geometric multigrid solvers generated by the ExaStencils framework.
The quest to increase memory density in Resistive
Random Access Memory (RRAM) has motivated researchers to
store more bits/cell by implementing Multi-Level Cell (MLC)
or multi-bit RRAM. Implementing multiple states narrows the
distance between states, making sensing of MLC RRAM a
challenging task. In this paper, we present a circuit which
senses the state of a MLC by converting the current drawn
from the cell to voltage pulses, where the number of pulses is
proportional to the current’s magnitude. The circuit distinguishes
between the states by the relative current’s magnitude and hence
does not require an absolute reference. Simulations in IHP’s
130 nm CMOS technology confirmed fast (single step) sensing
while tolerating appropriate variations in the sensed resistance.
The proposed circuit is also area efficient when compared to
conventional parallel sensing approach.
The orthogonalization of Boolean functions in disjunctive form, that means a Boolean function formed by sum of products, is a classical problem in the Boolean algebra. In this work, the novel methodology ORTH[ⴱ] of orthogonalization which is an universally valid formula based on the combination technique »orthogonalizing difference-building ⴱ« is presented. Therefore, the technique ⴱ is used to transform Sum of Products into disjoint Sum of Products. The scope of orthogonalization will be solved by a novel formula in a mathematically easier way. By a further procedure step of sorting product terms, a minimized disjoint Sum of Products can be reached. Compared to other methods or heuristics ORTH[ⴱ] provides a faster computation time.
Incorporating Variability of Resistive RAM in Circuit Simulations using the Stanford–PKU Model
(2020)
Intrinsic variability observed in resistive-switching
devices (cycle-to-cycle and device-to-device) is widely recognised
as a major hurdle for widespread adoption of Resistive RAM
technology. While physics-based models have been developed to
accurately reproduce the resistive-switching behaviour, reproducing
the observed variability behavior of a specific RRAM
has not been studied. Without a properly fitted variability in
the model, the simulation error introduced at the device-level
propagates through circuit-level to system-level simulations in
an unpredictable manner. In this work, we propose an algorithm
to fit a certain amount of variability to an existing physics-based
analytical model (Stanford-PKU model). The extent of
variability exhibited by the device is fitted to the model in a
manner agnostic to the cause of variability. Further, the model is
modified to better reproduce the variations observed in a device.
The model, fitted with variability can well reproduce cycle-to-cycle,
as well as device-to-device variations. The significance of
integrating variability into RRAM models is underscored using
a sensing example.