A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM

Please always quote using this URN: urn:nbn:de:bvb:29-opus4-123215
  • The quest to increase memory density in Resistive Random Access Memory (RRAM) has motivated researchers to store more bits/cell by implementing Multi-Level Cell (MLC) or multi-bit RRAM. Implementing multiple states narrows the distance between states, making sensing of MLC RRAM a challenging task. In this paper, we present a circuit which senses the state of a MLC by converting the current drawn from the cell to voltage pulses, where the number of pulses is proportional to the current’s magnitude. The circuit distinguishes between the states by the relative current’s magnitude and hence does not require an absolute reference. Simulations in IHP’s 130 nm CMOS technology confirmedThe quest to increase memory density in Resistive Random Access Memory (RRAM) has motivated researchers to store more bits/cell by implementing Multi-Level Cell (MLC) or multi-bit RRAM. Implementing multiple states narrows the distance between states, making sensing of MLC RRAM a challenging task. In this paper, we present a circuit which senses the state of a MLC by converting the current drawn from the cell to voltage pulses, where the number of pulses is proportional to the current’s magnitude. The circuit distinguishes between the states by the relative current’s magnitude and hence does not require an absolute reference. Simulations in IHP’s 130 nm CMOS technology confirmed fast (single step) sensing while tolerating appropriate variations in the sensed resistance. The proposed circuit is also area efficient when compared to conventional parallel sensing approach.show moreshow less

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Metadaten
Author:John ReubenORCiD, Dietmar Fey
URN:urn:nbn:de:bvb:29-opus4-123215
Publisher:IEEE
Document Type:Conference Proceeding
Language:English
Year of Completion:2019
Embargo Date:2019/10/29
Publishing Institution:Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)
Creating Corporation:IEEE Nordic Circuits and Systems Conference (NorCAS) 2019, October 29-30, Finland
Release Date:2019/10/28
Tag:read, multilevel cell (MLC), schmitt-trigger, sense amplifier, Resistive RAM, sensor, memristor
Institutes:Technische Fakultät
Dewey Decimal Classification:0 Informatik, Informationswissenschaft, allgemeine Werke / 00 Informatik, Wissen, Systeme / 000 Informatik, Informationswissenschaft, allgemeine Werke
open_access (DINI-Set):open_access
Licence (German):Creative Commons - CC BY - Namensnennung 4.0 International