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On the compliant behaviour of free-standing Si nanostructures on Si(001) for Ge nanoheteroepitaxy
(2012)
Due to its superior optoelectronic properties, Germanium (Ge) is attracting increasing interest to build up future photonic modules within Si chip baseline technology. Despite clear advantages of Ge integration in Si technology (identical diamond crystal structure with Si, complementary metal oxide semiconductor (CMOS) compatibility due to no contamination risks etc.), it faces also some true challenges limiting the optoelectronic performance. Among them, thermal and lattice mismatch result in too high defect levels (which act as non-radiative recombination centres). Parasitic diffusion and formation of SiGe alloys at elevated temperatures is also a common problem. In this respect, selective chemical vapor deposition Ge heteroepitaxy approaches for high quality Ge nanostructure growth with reasonable thermal budget must be developed for local Ge photonic module integration. A promising vision is offered by the compliant substrate effects within nanometer scale Ge/Si heteroepitaxial structures. Here, in contrast to the classical Ge deposition on bulk Si substrates, the thermal and lattice mismatch strain energy accumulated in the Ge epilayer is partially shifted to the free-standing Si nanostructure. This strain partitioning phenomenon is at the very heart of the nanoheteroepitaxy theory (NHE) and, if strain energy levels are correctly balanced, offers the vision to grow defect-free nanostructures of lattice mismatched semiconductors on Si. In case of the Ge/Si heterosystem with a lattice mismatch of 4.2%, the strain partitioning phenomenon is expected to be triggered when free-standing Si nanopillars with the width of 50 nm and below are used. In order to experimentally verify NHE with its compliant substrate effects, a set of free-standing Ge/Si nanostructures with diameter ranging from 150 to 50 nm were fabricated and investigated. The experimental verification of compliant substrate effects is challenging and requires sophisticated characterization techniques. The main limitation corresponds to a simultaneous detection of a) the strain partitioning phenomenon between Ge and Si and b) the absence of defects on the nano-scale. In this respect, synchrotron-based grazing incidence x-ray diffraction was applied to study the epitaxial relationship, defect and strain characteristics with high resolution and sensitivity in a non-destructive way. Raman spectroscopy supported by finite element method calculations were used to investigate the strain distribution within a single Ge/Si nanostructure. Special focus was devoted to transmission electron microscopy to determine the quality of the Ge epilayer. It was found, that although high quality Ge nanoclusters can be achieved by thermal annealing on Si pillars bigger than 50 nm in width, no proof of strain partitioning phenomenon was observed. In clear contradiction to the present NHE theory, no strain partitioning phenomenon was found even for ~50 nm wide Si pillars for which the compliant substrate effects are expected. The absence of the strain partitioning between Ge and Si is caused by the stress field exerted by the SiO2 growth mask on the Si nanopillar. In contrast to such nanostructures monolithically prepared from a Si(001) wafer, first results in this thesis clearly prove the strain partitioning phenomenon within Ge/Si nanostructures on Silicon–on–insulator substrate. Here, the compliant substrate effects were clearly observed for pillar widths even bigger than 50 nm. This experimental work demonstrates, that NHE with its compliant substrate effects, offers an interesting approach for high quality Ge nanostructures on Si, avoiding even the misfit dislocation network with its non-tolerable electrical activity in Ge nanodevices. However, the theory does not yet include important aspects of thin film growth on the nano-scale and must be further developed. It is the aim of this PhD thesis to provide this experimental basis for the Ge/Si heterosystem. Finally, it is noted that here developed growth approach is fully Si CMOS compatible and is not only relevant for Ge integration but also for other lattice mismatched alternative semiconductors (GaAs etc.) to enable higher performance / new functions in future Si microelectronics technologies.