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The complexity of today´s microelectronic circuitry is not only driven by complementary metal oxide semiconductor (CMOS) scaling, but also by integration of high performance modules for various applications (e.g. wireless and broadband communication systems). These mixed signal circuitries are build up by combining digital CMOS technology with analog SiGe:C hetero-bipolar transistors (HBT) known as SiGe:C BiCMOS technology. State-of-the-art SiGe:C BiCMOS technologies achieve up to the 500 GHz. Nevertheless, Si as semiconductor material is approaching more and more its physical limits, whereby novel approaches have to be found to ensure the future development of SiGe:C HBT BiCMOS technology in order to push the maximum frequency further into the Terahertz regime. Based on this task, two novel material science strategies are investigated in this Ph.D. thesis in terms of material growth and defect studies: A.) Solid-phase epitaxy (SPE) for emitter and base resistivity: This technique has been investigated for local engineering of crystallinity in emitter and base layer of already established SiGe:C HBT technology in order to improve the speed performance. By introducing disilane as new gas source with respect to standard used silane, it is possible to reduce the CVD growth temperature for Si, enabling the differential growth of epitaxial-Si (epi-Si) on Si and amorphous Si (a-Si) on the SiO2 and Si3N4 masks. The so produced requirement for SPE treatments is evaluated for two possible areas of application: A1.) Emitter region and A2.) Base region. In both cases, SPE techniques are applied to change the standard polycrystalline-Si (poly-Si) emitter and base link area on the SiO2 and Si3N4 masks to a fully epi-Si area in order to lower emitter and base resistivity, respectively. B.) III-V/SiGe hybrid device: The ternary compound semiconductor In1-xGaxP [x=0–1] is introduced as potential new collector material as part of an III-V/SiGe hybrid HBT device. With InP having a three times higher saturation velocity, and GaP having a two times bigger bandgap than Si, this approach offers the possibility to adjust speed and power performance of HBTs in a flexible way as a function of the In1-xGaxP collector chemical composition x. The material growth and defect studies in this Ph.D. thesis produced insights, which lead to the following results for future device application: A1.) SPE for emitter region: After investigating the temperature, time and doping concentration dependence on lateral SPE length of in-situ annealed As-doped epi-Si/a-Si test structures, it was possible to crystallize up to 500 nm of a-Si on SiO2 and Si3N4 masks to epi-Si with low defect densities by a combination of 575 °C and 1000 °C postannealing. A2.) SPE for base region: After studying the dependence of time, temperature, thickness, SiO2-capping and Ge incorporation on lateral SPE length of in-situ annealed undoped epi-Si/a-Si test structures, it was possible to crystallize up to 450 nm of SiO2-capped undoped a-Si on SiO2 mask to low-defective epi-Si by 570 °C postannealing. Finally, this technique is applied in a SiGe:C base model structure in order to show the possibility to widen the monocrystalline region around the bipolar window, which results in a possibly improved base resistivity. B.) GaP/Si0.8Ge0.2/Si(001) heterostructure: For pseudomorphic GaP/Si0.8Ge0.2/Si(001) heterostructure growth, the critical thickness of GaP on Si and maximum thermal budget for GaP deposition is evaluated. A detailed structure and defect characterization study by XRD, AFM, and TEM is reported on single crystalline 170 nm GaP/20 nm Si0.8Ge0.2/Si(001) heterostructure. Results show that 20 nm Si0.8Ge0.2 on Si(001) can be overgrown by 170 nm GaP without affecting the pseudomorphism of the Si0.8Ge0.2/Si(001) systems. The GaP layer grows however partially relaxed, mainly due to defect nucleation at the GaP/Si0.8Ge0.2 interface during initial island coalescence. The achievement of 2D GaP growth conditions on Si0.8Ge0.2/Si(001) systems is thus a crucial step for achieving fully pseudomorphic heterostructures. Anti-phase domain-free GaP growth is observed for film thicknesses beyond 70 nm. In addition, no detrimental impurity diffusion could be found in the GaP/Si0.8Ge0.2/Si(001) heterostructure. Finally, it is to mention that further investigation and efforts are still needed to push these new approaches to full integration into SiGe:C HBT BiCMOS technology concepts: A.) For SPE application: Electrical studies are needed in frame of full processed devices to evaluate the value and required modifications for process integration. B.) For III-V/SiGe hybrid device: Future work has to focus on improved 2D GaP layer conditions (before introducing InP) in order to prepare truly pseudomorphic GaP/Si0.8Ge0.2/Si(001) heterostructures with low defect densities. For this purpose, selective GaP growth studies in local HBT Si0.8Ge0.2/Si(001) mesa structures are the next step.