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In the time of increased awareness about the environment problems by the public opinion and also intensive international efforts to reduce emissions of greenhouse gases, as well increase of the generation of electrical energy to facilitate industrial growth, the conference offers broad contribution towards achieving the goals of diversification and sustainable development.
Focus of the student conference is to promote the discussion of views from scientists and students from Wroclaw University of Technology, Technical University of Ostrava and Brandenburg University of Technology Cottbus-Senftenberg.
The conference offers prominent academics and industrial practitioners from all over the world the forum for discussion about the future of electrical energy and environmental issues and presents a base for identifying directions for continuation of research.
In the time of increased awareness about the environment problems by the public opinion and also intensive international efforts to reduce emissions of greenhouse gases, as well increase of the generation of electrical energy to facilitate industrial growth, the conference offers broad contribution towards achieving the goals of diversification and sustainable development.
Focus of the student conference is to promote the discussion of views from scientists and students from Wroclaw University of Technology, Technical University of Ostrava and Brandenburg University of Technology Cottbus-Senftenberg.
The conference offers prominent academics and industrial practitioners from all over the world the forum for discussion about the future of electrical energy and environmental issues and presents a base for identifying directions for continuation of research.
The strive for performance, low power consumption, and less chip area have been diminishing the reliability and the time to fault occurrences due to wear out of electronic devices. Recent research has shown that functional units within processors usually execute a different amount of operations when running programs. Therefore, these units present different individual wear out during their lifetime. Most existent schemes for re-configuration of processors due to fault detection and other processor parameters are done at the level of cores which is a costly way to achieve redundancy. This paper presents a low latency (approximately 1 clock cycle) software controlled mechanism to reconfigure units within processor cores according to predefined parameters. Such reconfiguration capability delivers features like wear out balance of processor functional units, configuration of units according to the criticality of tasks running on an operating system and configurations to gain in performance (e.g. parallel execution) when possible. The focus of this paper is to show the implemented low latency reconfiguration mechanism and highlight its possible main features.
Scaling minimum features of ICs down to the 10nm- area and below has allowed high integration rates in electronics. Scaling at supply voltages of 1V and below also implies a rising level of stress which drives aging effects that reduce switching speed and the expected life time. Additionally, vulnerability from particle radiation is increased. Hence, fault detection and on-line correction become a must for many applications. However, not only fault tolerance but self-awareness becomes also an advantage. Provided that by being aware of its own healthy state allow optimized configurations regarding system operation modes and configurable hardware mechanism. This paper shows a preliminary work in a configurable circuit and explores its configuration possibilities when integrated into a complete system.
Dieser Band umfasst die Vorträge eines Workshops, der im Rahmen des DBU-Projekts „Bewahrung von vorindustriellen Meilerstandorten in Brandenburg – Ein Beitrag zur modellhaften Sicherung und nachhaltigen Nutzung einer durch anth-ropogene Umwelteinflüsse gefährdeten historischen Kulturlandschaft“ am 19. Februar 2019 an der BTU in Cottbus durchgeführt wurde. Ziel des DBU-Projekts ist es, vorindustrielle Meilerstandorte im Land Brandenburg möglichst flächenhaft zu erfassen und deren Denkmalwert zu ermitteln, um einen Beitrag zum Schutz dieser bisher kaum beachteten Bestandteile der historischen Kulturlandschaft zu leisten. In der Modellregion Niederlausitz wird ein auf GIS-Methoden basiertes Verfahren entwickelt, mit dessen Hilfe Strategien und Konzepte erarbeitet werden, die auch in anderen Regionen die Bewahrung historischer HKM-Landschaften und anderer vorindustrieller Kulturlandschaftsrelikte erlaubt. Wesentliches Element des Verfahrens ist eine Musteranalyse, mit der das Mosaik an HKM-Standorten und die Bezüge ganzer HKM-Gruppen zu weiteren Kulturrelikten und v. a. auch Hinterlassenschaften der historischen Landnutzung dargestellt werden. So lassen sich Kategorien für die Schutzwürdigkeit einzelner Standorte oder ganzer HKM-Areale ableiten, auf deren Grundlage die Ausweisung von Schutzgebieten erfolgen kann. Aufgrund der Zusammenarbeit von Behörden und einer Universität sowie durch die Einbindung lokaler und regionaler Akteure der unterschiedlichen Fachdisziplinen können hier Nutzungs- und Interessenkonflikte im Schnittbereich von Denkmal-, Natur- und Umweltschutz praxisnah vermieden werden. Die Beiträge in diesem Tagungsband reichen von aktuellen Ergebnissen der Meilerforschung bis hin zu denkmalpflegerischen Aspekten und bilden eine wichtige Grundlage für die Diskus-sion in dem o.g. DBU-Projekt.