2805
2013
eng
report
0
2013-09-19
--
--
12. GI/ITG Fachgespräch Sensornetze
Drahtlose Sensornetze stellen eine vielversprechende Technologie zur Beobachtung und Beeinflussung von Vorgängen in der realen Welt dar. Autonome Sensorknoten nehmen dabei Parameter der Umwelt durch Sensoren wahr und können diese durch Aktoren beeinflussen. Viele solcher autonomen und ressourcenbeschränkten Knoten kooperieren dabei mittels drahtloser Kommunikation. Die Eigenschaften dieser Knoten und Netze implizieren eine Vielzahl von neuartigen Herausforderungen, die sich in einer regen Forschungsaktivität widerspiegeln. Ziel dieser Reihe von Fachgesprächen ist es, Wissenschaftlerinnen und Wissenschaftlern aus Hochschule und Industrie die Möglichkeit zu einem informellen Gedankenaustausch zu geben und die Kooperation in diesem multidisziplinären Forschungsbereich zu verstärken.
urn:nbn:de:kobv:co1-opus-28986
2898
Hofstedt, Petra ; Cunningham, Douglas W. ; Schmitt, Ingo
Jörg Nolte
Computer science reports / Institut für Informatik
2013,03
deu
swd
Drahtloses Sensorsystem
Datenverarbeitung; Informatik
Wiss. Publikationen
Institut für Informatik
Institut für Informatik
BTU Cottbus - Senftenberg
https://opus4.kobv.de/opus4-btu/files/2805/CSR_03_13.pdf
5050
2019
eng
conferenceobject
0
2019-11-27
--
--
Configurable Fault Tolerant Circuits and System Level Integration for Self-Awareness
Scaling minimum features of ICs down to the 10nm- area and below has allowed high integration rates in electronics. Scaling at supply voltages of 1V and below also implies a rising level of stress which drives aging effects that reduce switching speed and the expected life time. Additionally, vulnerability from particle radiation is increased. Hence, fault detection and on-line correction become a must for many applications. However, not only fault tolerance but self-awareness becomes also an advantage. Provided that by being aware of its own healthy state allow optimized configurations regarding system operation modes and configurable hardware mechanism. This paper shows a preliminary work in a configurable circuit and explores its configuration possibilities when integrated into a complete system.
978-3-902457-54-7
urn:nbn:de:kobv:co1-opus4-50503
10.26127/BTUOpen-5050
Proceedings of the Work in Progress Session held in connection with SEAA 2019, the 45th EUROMICRO Conference on Software Engineering and Advanced Applications and DSD 2019, 22nd EUROMICRO Conference on Digital System Design
SEA-Publications
SEA-SR-54 (Bestellnummer)
European Union Horizon 2020 Marie Skłodowska-Curie actions / 722325
Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
Raphael Segabinazzi Ferreira
Nevin George
Junchao Chen
Michael Hübner
Milos Krstic
Jörg Nolte
Heinrich Theodor Vierhaus
eng
uncontrolled
Self-awareness
deu
uncontrolled
Configurable circuits
deu
uncontrolled
Fault tolerant
deu
uncontrolled
Operation modes
deu
swd
Integrierte Schaltung
deu
swd
Konfiguration <Informatik>
deu
swd
Fehlertoleranz
Systeme
Wiss. Publikationen
FG Verteilte Systeme und Betriebssysteme
OpenAIRE
Zweitveröffentlichungen
BTU Cottbus - Senftenberg
https://opus4.kobv.de/opus4-btu/files/5050/raphael_SegabinazziFerreira_DSD2019.pdf
5916
2020
eng
359
396
bookpart
0
2022-05-13
--
--
End2End100 : communication protocol processing for ultra high data rates
End2End100 : Kommunikations-Protokoll–Prozessierung für ultrahohe Datenraten
In 2012 a group of researchers proposed a basic research initiative to the German Research Foundation (DFG) as a special priority project (SPP) with the name: Wireless 100 Gbps and beyond. The main goal of this initiative was the investigation of architectures, technologies and methods to go well beyond the state of the art. The target of 100 Gbps was set far away from the (at that time) achievable 1 Gbps such that it was not possible to achieve promising results just by tuning some parameters. We wanted to find breakthrough solutions. When we started the work on the proposal we discussed the challenges to be addressed in order to advancing the wireless communication speed significantly. Having the fundamental Shannon boundary in mind we discussed how to achieve the 100 Gbps speed.
Angesichts der rapiden Entwicklung der Funkkommunikation hat die Deutsche Forschungsgemeinschaft im Jahr 2012 ein Schwerpunktprogramm mit dem Titel "Wireless 100 Gbps and beyound" (dt.: Drahtloskommunikation mit 100 Gbps und mehr) gestartet. Diese Initiative zielte auf neue Lösungen, Methoden und neues Wissen zur Lösung des Problems des kontinuierlichen Bedarfs an immer höheren Datenraten im Bereich der Funkkommunikation. Eine international besetze Jury hat etliche Projektvorschläge evaluiert, aus denen 11 Projekte ausgewählt und über zweimal 3 Jahre von Mitte 2013 bis Mitte 2019 gefördert wurden. Das vorliegende Buch versammelt die Ansätze, Architekturen und Erkenntnisse der Projekte. Es überspannt einen breiten Themenbereich, angefangen mit speziellen Fragen der physikalischen Übertragung, des Antennendesigns und der HF-Eingangs-Architekturen für unterschiedliche Frequenzbereiche bis 240 GHz. Darüber hinaus beschreibt das Buch Ansätze für Ultra-Hochgeschwindigkeits-Funksysteme, deren Basisbandverarbeitung, Kodierung sowie mögliche Umsetzungen. Nicht zuletzt wurden auch Fragen des Protokolldesigns behandelt, um eine enge Integration in moderne Computersysteme zu erleichtern.
Wireless 100 Gbps and beyond : architectures, approaches and findings of German Research Foundation (DFG) Priority Programme SPP1655
10.26127/BTUOpen-5916
publish
Druckausgabe: Wireless 100 Gbps and beyond : architectures, approaches and findings of German Research Foundation (DFG) Priority Programme SPP1655 / Rolf Kraemer and Stefan Scholz (Editor). - Frankfurt (Oder) : IHP GmbH, August 2020. - xxix, 489 Seiten : Illustrationen, Diagramme - ISBN 978-3-96439-003-5
Kapitel von: <a href="https://opus4.kobv.de/opus4-btu/frontdoor/index/index/docId/5716">Wireless 100 Gbps and beyond</a>
false
true
Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
Steffen Büchner
Jörg Nolte
Alireza Hasani
Rolf Kraemer
Lukasz Lopacinsiki
eng
uncontrolled
100 Gbps
eng
uncontrolled
Wireless
deu
uncontrolled
Drahtlos
eng
uncontrolled
End2End100
eng
uncontrolled
Communication protocol processing
deu
uncontrolled
Kommunikations-Protokoll–Prozessierung
deu
swd
Drahtloses Sensorsystem
deu
swd
Hochfrequenztechnik
deu
swd
Antenne
deu
swd
Terahertzbereich
deu
swd
Energieffizienz
Informatik, Informationswissenschaft, allgemeine Werke
Wiss. Publikationen
FG Systeme
Zweitveröffentlichungen
BTU Cottbus - Senftenberg
328
2003
deu
periodicalpart
Brandenburgische Technische Universität Cottbus / Institut für Informatik
0
2007-08-01
--
--
Jahresbericht 2001/2002 / Institut für Informatik
Annual Report 2001/2002 / Department for Computer Science
Selbstdarstellung des Instituts für Informatik der BTU Cottbus und Berichte der Lehrstühle für die Jahre 2001 und 2002.
Presentation of the Department for Computer Science of the BTU Cottbus and reports of the chairs at the department for the years 2001 and 2002.
urn:nbn:de:kobv:co1-opus-3527
352
<b>Ab 2003/2005 u.d.T.: <a href="http://opus4.kobv.de/opus4-btu/solrsearch/index/search/searchtype/series/id/12"> Jahresbericht / Institut für Informatik, Informations- und Medientechnik</a></b>
Bernhard Thalheim
Monika Heiner
Winfried Kurth
Peter Bachmann
Hartmut König
Claus Lewerentz
Heinrich Theodor Vierhaus
Burchard von Braunmühl
Jörg Nolte
Jahresbericht / Institut für Informatik
2001/2002
deu
swd
Cottbus / Technische Universität
deu
swd
Bericht
deu
uncontrolled
Informatik
deu
uncontrolled
BTU Cottbus
eng
uncontrolled
Computer Science
eng
uncontrolled
BTU Cottbus
Datenverarbeitung; Informatik
Amtsdruckschriften
Institut für Informatik
Institut für Informatik
BTU Cottbus - Senftenberg
https://opus4.kobv.de/opus4-btu/files/328/inf_bericht_2001_2002.pdf
326
2006
deu
periodicalpart
Brandenburgische Technische Universität Cottbus / Institut für Informatik, Informations- und Medientechnik
0
2007-07-25
--
--
Jahresbericht 2003/2005 / Institut fuer Informatik, Informations- und Medientechnik
Annual Report 2003/2005 / Department for Computer Science, Information and Media Technology
Selbstdarstellung des Instituts für Informatik, Informations- und Medientechnik der BTU Cottbus und Berichte der Lehrstühle für die Jahre 2003, 2004 und 2005.
Presentation of the Department for Computer Science, Information and Media Technology of the BTU Cottbus and reports of the chairs at the department for the years 2003, 2004 and 2005.
urn:nbn:de:kobv:co1-opus-3488
348
<b>Bis 2001/2002 u.d.T.: <a href="http://opus4.kobv.de/opus4-btu/solrsearch/index/search/searchtype/series/id/11">Jahresbericht / Institut für Informatik</a></b>
Winfried Kurth
Peter Bachmann
Monika Heiner
Hartmut König
Rolf Kraemer
Claus Lewerentz
Jörg Nolte
Bernhard Thalheim
Heinrich Theodor Vierhaus
Burchard von Braunmühl
Gerd Wagner
Jahresbericht / Institut für Informatik, Informations- und Medientechnik
2003/2005
deu
swd
Cottbus / Technische Universität
deu
swd
Bericht
deu
uncontrolled
Informatik
deu
uncontrolled
Informations- und Medientechnik
deu
uncontrolled
BTU Cottbus
eng
uncontrolled
Computer Science
eng
uncontrolled
Information Technology
eng
uncontrolled
Media Technology
eng
uncontrolled
BTU Cottbus
Datenverarbeitung; Informatik
Amtsdruckschriften
Institut für Informatik
Institut für Informatik
BTU Cottbus - Senftenberg
https://opus4.kobv.de/opus4-btu/files/326/jb0305.pdf
5049
2019
eng
conferenceobject
0
2019-11-27
--
--
Low latency reconfiguration mechanism for fine-grained processor internal functional units
The strive for performance, low power consumption, and less chip area have been diminishing the reliability and the time to fault occurrences due to wear out of electronic devices. Recent research has shown that functional units within processors usually execute a different amount of operations when running programs. Therefore, these units present different individual wear out during their lifetime. Most existent schemes for re-configuration of processors due to fault detection and other processor parameters are done at the level of cores which is a costly way to achieve redundancy. This paper presents a low latency (approximately 1 clock cycle) software controlled mechanism to reconfigure units within processor cores according to predefined parameters. Such reconfiguration capability delivers features like wear out balance of processor functional units, configuration of units according to the criticality of tasks running on an operating system and configurations to gain in performance (e.g. parallel execution) when possible. The focus of this paper is to show the implemented low latency reconfiguration mechanism and highlight its possible main features.
10.1109/LATW.2019.8704560
urn:nbn:de:kobv:co1-opus4-50497
R. Segabinazzi Ferreira and J. Nolte: Low latency reconfiguration mechanism for fine-grained processor internal functional units, 2019 IEEE Latin American Test Symposium (LATS), Santiago, Chile, 2019, pp. 1-6. DOI 10.1109/LATW.2019.8704560
European Union Horizon 2020 Marie Skłodowska-Curie actions / 722325
Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
Raphael Segabinazzi Ferreira
Jörg Nolte
eng
uncontrolled
Functional units low latency
eng
uncontrolled
Fine-grained
eng
uncontrolled
Reconfiguration
eng
uncontrolled
Software
deu
swd
Rekonfiguration
deu
swd
Mikroprozessor
deu
swd
Latenzzeit <Informatik>
Systeme
Wiss. Publikationen
FG Verteilte Systeme und Betriebssysteme
OpenAIRE
Zweitveröffentlichungen
BTU Cottbus - Senftenberg
5203
2020
eng
conferenceobject
Institute of Electrical and Electronics Engineers Inc. (IEEE)
Nashville, TN, USA
0
2020-06-19
--
--
Real-time dynamic hardware reconfiguration for processors with redundant functional units
The tiny logic elements in modern integrated circuits increase the rate of transient failures significantly. Therefore, redundancy on various levels is necessary to retain reliability. However, for mixed-criticality scenarios, the typical processor designs offer either too little fault-tolerance or too much redundancy for one part of the applications. Amongst others, we specifically address redundant processor internal functional units (FU) to cope with transient errors and support wear leveling. A real-time operating system (RTOS) was extended to control our prototypical hardware platform and, since it can be configured deterministically within few clock cycles, we are able to reconfigure the FUs dynamically, at process switching time, according to the specified critically of the running processes. Our mechanisms were integrated into the Plasma processor and the Plasma-RTOS. With few changes to the original software code, it was, for example, possible to quickly change from fault-detecting to fault-correcting modes of the processor on demand.
Proceedings of the 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)
978-1-7281-6958-3
2375-5261
10.1109/ISORC49007.2020.00035
urn:nbn:de:kobv:co1-opus4-52031
R. Rotta, R. Segabinazzi Ferreira and J. Nolte, "Real-Time Dynamic Hardware Reconfiguration for Processors with Redundant Functional Units," 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC), Nashville, TN, USA, 2020, pp. 154-155, doi: 10.1109/ISORC49007.2020.00035
European Union Horizon 2020 Marie Skłodowska-Curie actions
722325
Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
Randolf Rotta
Raphael Segabinazzi Ferreira
Jörg Nolte
eng
uncontrolled
Reconfiguration
eng
uncontrolled
Run-Time
eng
uncontrolled
Modular redundancy
eng
uncontrolled
Mixed-criticality
deu
swd
Rekonfiguration
deu
swd
Laufzeit
deu
swd
Funktionseinheit
deu
swd
Redundanz <Informatik>
Systeme
Wiss. Publikationen
FG Verteilte Systeme und Betriebssysteme
OpenAIRE
Zweitveröffentlichungen
BTU Cottbus - Senftenberg
5180
2020
eng
conferenceobject
0
2020-05-25
--
--
Run-time hardware reconfiguration of functional units to support mixed-critical applications
System reconfiguration of hardware resources has been done in multiple system domains. Such systems are usually found in the context of FPGAs, where reconfiguration is done usually over its primitives (e.g., LUTs, Flip-Flops). Or even in the context of MPSoC designs, where core management (e.g., lock-step operation in multi-core designs) is the most used approach. However, recent works have shown that configuration at Functional Units (FUs) granularity might come with benefits. For example, it can increase the configuration space due to its finer granularity, and, as a consequence, the options to deal with problems (e.g., due to aging) in the units itself. Within this context, this paper presents a system capable to configure its FUs (e.g., ALUs, multipliers, dividers) into different operation modes. The system uses an Operating System to control HW reconfiguration during process switching time and takes into account the health state of its units in a mixed-criticality applications scenario. Results show that, within this scenario, the system is able to reconfigure itself accomplishing health state modifications of its HW elements.
10.1109/LATS49555.2020.9093692
urn:nbn:de:kobv:co1-opus4-51804
R. Segabinazzi Ferreira; J. Nolte; F. Vargas; N. George and M. Hübner: Run-time Hardware Reconfiguration of Functional Units to Support Mixed-Critical Applications, 2020 IEEE Latin-American Test Symposium (LATS), Maceio, Brazil, 2020, pp. 1-6. DOI 10.1109/LATS49555.2020.9093692
European Union Horizon 2020 Marie Skłodowska-Curie actions / 722325
Keine Lizenz vergeben. Es gilt das deutsche Urheberrecht.
Raphael Segabinazzi Ferreira
Jörg Nolte
Fabian Vargas
Nevin George
Michael Hübner
eng
uncontrolled
Reconfiguration
eng
uncontrolled
Functional units
eng
uncontrolled
Fine-grained
eng
uncontrolled
Mixed-criticality
eng
uncontrolled
Run-time
deu
swd
Rekonfiguration
deu
swd
Laufzeit
deu
swd
Funktionseinheit
deu
swd
Fehlererkennung
Systeme
Wiss. Publikationen
FG Verteilte Systeme und Betriebssysteme
OpenAIRE
Zweitveröffentlichungen
BTU Cottbus - Senftenberg