@phdthesis{MatbaechiEttehad2021, author = {Matbaechi Ettehad, Honeyeh}, title = {Dielectrophoretic manipulation of yeast cells using CMOS integrated microfluidic}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-55315}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {The rapid detection of infectious diseases is still an unsolved problem since their identification must be carried out either by cultivation or DNA analysis in a laboratory. The development of point-of-care (PoC) is a current development trend that requires further technological impulses to produce reliable and cost-effective systems. By miniaturizing and integrating microfluidic and electronic components, the advantages of electronic methods can be transferred to the field of PoC testing. The combination of complementary metal-oxide-semiconductor (CMOS) technology with microfluidic platforms allowed the development of fully functional sample-to-result LoC setups, which served the portability of the device even out of the laboratory or hospitals. CMOS-based LoC device can control and manage the data from sensors, microfluidics, and actuators. Dielectrophoresis (DEP) is a non-destructive and non-invasive method promising to be used in PoC medical applications. Utilizing MEMS technology and fabrication of microelectrodes allow DEP to be applied in biomedical applications such as cell manipulation and separation with high speed, sensitivity and without any labeling. Cell detection and separation occupy an important place in diagnostics of viral and infectious diseases such as Influenza and COVID-19. Therefore, rapid, sensitive, and automated LoC devices are needed to detect such diseases. Starting from this point of view, manipulating the cells as a way to detect them using DEP was decided as the main objective of the thesis. This work aimed at developing a miniaturized CMOS integrated silicon microfluidic device, in line with a standard CMOS procedure, for characterization and manipulation of live and dead yeast cells using the DEP technique. Understanding the relationship between the microelectrode's geometry and the magnitude of DEP force, the microfluidic devices can be designed to produce the most effective DEP implication on biological samples. In this work, interdigitated electrode arrays (IDEs) were used to manipulate the cells. This microelectrode was primarily used to detect microorganisms in a solution, based on the measurement of the variation of the dielectric constant by the concentration of the microorganisms. Therefore, finite element simulations were performed to optimize this microelectrode and adapt it to our application. Thus, the IDEs were optimized as a function of finger width and spacing between adjacent fingers. One of the most serious matters related to DEP-based microfluidic devices is that the DEP spectra of the targeted cell should precisely be known. Therefore, the DEP spectrum analysis of various cell suspensions with different medium conductivities was studied comprehensively by finite element simulation and experimentally. This study presented an optimized trapping platform for both detection and separation applications in terms of electrode dimension and electrical parameters.}, subject = {Dielectrophoresis (DEP); Yeast cell; Cell manipulation; Interdigitated electrodes (IDEs); CMOS-integrated microfluidic Lab-on-a-chip; Dielektrophorese (DEP); Hefezelle; Zellmanipulation; Interdigitalelektroden (IDEs); CMOS-integriertes mikrofluidisches Lab-on-a-chip; CMOS; Lab on a Chip; Dielektrophorese; Saccharomyces cerevisiae; Mikrofluidik; Biomedizinische Technik}, language = {en} } @phdthesis{KalishettyhalliMahadevaiah2023, author = {Kalishettyhalli Mahadevaiah, Mamathamba}, title = {Process development and electrical characterization of CMOS-integrated memristive devices for emerging non-volatile memory applications}, doi = {10.26127/BTUOpen-6557}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-65571}, school = {BTU Cottbus - Senftenberg}, year = {2023}, abstract = {Energy efficiency is vital for future low-power electronic applications. This ultra-low power consumption requirement enables the research beyond the conventional charge-based memories. Further, reliability, high scalability, fast switching, CMOS compatibility, high endurance, etc., are some of the characteristics envisaged by the new generation of emerging non-volatile memories (NVMs). A memristor or OxRAM is one among the many emerging NVMs, which can exhibit the aforementioned characteristics, and it has the potential to replace the power-hungry conventional NVMs. The memristive devices have the advantage of monolithic integration with the CMOS logic, which enables the widening of their application areas. Despite their various advantages, the reliability, forming voltages, and variability of the devices pose a hurdle to their wide commercial usage. Hence, it is crucial to identify these factors and mitigate them. This thesis addresses these issues through fabrication process improvements, electrical characterization techniques, and device-engineering methods. The improvements in the fabrication processes reduced the pristine state currents of the memristive devices. It impacted the reliability and resistive switching performance of the memristive devices directly. To further improve the performance, the memristive devices are integrated into the 130 nm BiCMOS baseline technology of IHP. Additionally, dedicated test structures are developed to monitor and control the fabrication process steps through in-line electrical characterization. Further, the forming current and voltage values, along with their dispersions in the 4 kbit memristive arrays, were reduced by utilizing the electrical characterization techniques. Accordingly, the forming operations were performed at high operating temperatures using incremental step pulse and verify algorithm (ISPVA). In contrast to the well-known method of increasing the current compliance (1R) or the gate voltage of the transistor (1T-1R) to increase the conduction filament size, a thin layer of Al2O3 is added. This device engineering technique reduced the variability in both LRS and HRS currents of the memristive devices. Additionally, the conduction filament properties in both states are modeled by using the quantum point contact (QPC) model. Finally, harnessing the intrinsic variability of the memristive devices for neuromorphic computing applications is demonstrated. The reliability of the devices is assessed through endurance and retention characteristics.}, subject = {Memristive devices; RRAM; ISPVA; Forming; Variability; Formierspannung; Variabilit{\"a}t; Dispersion; Leitungsdraht; Neuromorphe Anwendungen; CMOS; Nichtfl{\"u}chtiger Speicher; Memristor; Modellierung; Dispersion}, language = {en} } @phdthesis{Kaletta2014, author = {Kaletta, Udo Christian}, title = {Entwicklung CMOS kompatibler Oberfl{\"a}chenwellenfilter (SAW) basierend auf Aluminiumnitrid f{\"u}r die Biosensorik und drahtlose Datenkommunikation}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-31993}, school = {BTU Cottbus - Senftenberg}, year = {2014}, abstract = {Einleitung: Akustische Oberfl{\"a}chenwellenfilter (SAW Filter) finden in zahlreichen drahtlosen und drahtgebundenen Kommunikationstechnologien sowie in der Sensorik ihren Einsatz. Dabei f{\"u}hrt der Trend hin zu immer preiswerteren und kompakteren L{\"o}sungen mit noch mehr Funktionalit{\"a}t und noch geringeren Stromverbr{\"a}uchen. Die Anwendungen erstrecken sich dabei von ultraenergiesparenden Kommunikationssystemen (z. B. f{\"u}r Sensorknoten) bis hin zu preiswerteren Multisensorarrays in der Sensorik (z. B. Biosensoren) sowie auf einem Chip integrierten Mikrofluidik Systemen (z. B. Mikroliterpumpen). Eine L{\"o}sung stellt die Integration der SAW Filter auf einem Chip zusammen mit integrierten Schaltkreisen (IC) in der sogenannten komplement{\"a}ren-Metall-Oxid-Halbleiter (CMOS) Technologie dar. Da es sich hierbei um ein neues Forschungsgebiet handelt und nur wenige Forschergruppen auf diesem Gebiet arbeiten sind umfangreiche wissenschaftliche Untersuchungen notwendig, um eine vollst{\"a}ndige Integration der SAW Filter zu erm{\"o}glichen. Das einzige reinraumkompatible piezoelektrische Material mit einem ausreichend hohen elektromechanischen Kopplungsfaktor (K2) sowie einer hohen akustischen Ausbreitungsgeschwindigkeit (vAlN = 5760 m/s [Bu 2006]) f{\"u}r hohe Arbeitsfrequenzen (bis ~6 GHz) ist dabei Aluminiumnitrid (AlN). Daf{\"u}r muss es hoch c-achsenorientiert (<2°) aufgewachsen werden. Ein großes Problem bei der Integration ist das elektromagnetische {\"U}bersprechen (Crosstalk), welches besonders auf den f{\"u}r die CMOS Technologie notwendigen niederohmigen Siliziumsubstraten auftritt. Ziel: Diese Doktorarbeit untersucht die M{\"o}glichkeit der Integration von AlN basierten SAW Filtern mit Hilfe von diskreten Bauelementen, aufgebaut mit CMOS kompatiblen Schichtsystemen, in Hinblick auf eine sp{\"a}tere CMOS kompatible Vollintegration. Ergebnisse: Es konnte gezeigt werden, dass AlN basierte Filter mit Hilfe von CMOS kompatiblen Materialien und Prozessschritten hergestellt werden k{\"o}nnen. Außerdem konnte gezeigt werde, dass AlN sehr gut (full width at half maximum, FWHM: 1,27° - 1,9°) c-achsenorientiert aufgewachsen werden kann. Umfangreiche Simulationen, die mit Hilfe der finiten Element Methode (FEM) durchgef{\"u}hrt wurden, zeigten akustische Wellen (Rayleighwelle R0 und an der Oberfl{\"a}che gef{\"u}hrte Volumenwelle R1) mit Geschwindigkeiten von circa 4200 m/s (R0) bzw. 5200 m/s (R1) im technisch relevanten Frequenzbereich (~2,4GHz). Es wurde festgestellt, dass die akustische Reflektivit{\"a}t von Wolfram basierten Fingerelektroden circa ein bis zwei Gr{\"o}ßenordnungen h{\"o}her liegt als bei Aluminium basierten Elektroden. Hergestellte SAW Filter zeigten maximale Resonanzfrequenzen von 3,3 GHz bei einer Wellenl{\"a}nge von 1,68 µm, diese k{\"o}nnen noch auf bis zu 6,6 GHz bei einer minimalen Wellenl{\"a}nge von 0,8 µm gesteigert werden. In dieser Arbeit konnte erstmals ein elektromagnetisches {\"U}bersprechen (Crosstalk) von unter -65 dB auf standardm{\"a}ßig niederohmigen Siliziumsubstraten gezeigt werden. Erste optimierte SAW Filteranwendungen zeigten typische Frequenzantworten mit guter Performance.}, subject = {Surface acoustic wave; Crosstalk; Oberfl{\"a}chenwellenfilter; Aluminiumnitrid; SAW Filter; CMOS; Oberfl{\"a}chenwellenfilter}, language = {de} } @phdthesis{Tarnawska2012, author = {Tarnawska, Lidia}, title = {Novel oxide buffer approach for GaN integration on Si(111) platform through Sc₂O₃/Y₂O₃ bi-layer}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus-27904}, school = {BTU Cottbus - Senftenberg}, year = {2012}, abstract = {Motivation: Preparation of GaN virtual substrates on large-scale Si wafers is intensively pursued as a cost-effective approach for high power/high frequency electronics (HEMT's etc.) and optoelectronic applications (LED, LASER). However, the growth of high quality GaN layers on Si is hampered by several difficulties mainly related to a large lattice mismatch (-17\%) and a huge difference in the thermal expansion coefficient (56\%). As a consequence, GaN epitaxial layers grown on Si substrates show a high number of defects (threading dislocations etc.), which severely deteriorate the overall quality of the GaN films. Additionally, due to the different thermal expansion coefficients of the substrate and the film, µm-thick GaN layers crack during post-growth cooling. To solve these integration problems, different semiconducting (e.g. AlN, GaAs, ZnO, HfN) and insulating (e.g. Al₂O₃, MgO, LiGaO₂) buffer layers, separating the Si substrate from the GaN film, are applied. Goal: In this thesis, a novel buffer approach for the integration of GaN on Si is proposed and investigated. The new approach employs Sc₂O₃/ Y₂O₃ bilayer templates as a step-graded buffer to reduce the lattice mismatch between GaN and the Si(111) substrate. According to the bulk crystal lattices, since the Y₂O₃ has an in-plane lattice misfit of -2\% to Si, Sc₂O₃ -7\% to Y₂O₃, the lattice misfit between GaN and the substrate can be theoretically reduced by about 50\% from -17\% (GaN/Si) to -8\% (GaN/Sc₂O₃). Experimental: The GaN/Sc₂O₃/ Y₂O₃/Si(111) heterostructures are prepared in a multichamber molecular beam epitaxy system on 4 inch Si(111) wafers. In order to obtain complete information on the structural quality of the oxide buffer as well as the GaN layer, synchrotron- and laboratory-based x-ray diffraction, transmission electron microscopy and photoluminescence measurements are performed. The topography of the films is characterized by scanning electron microscopy and chemical inter-diffusion is investigated by energy-dispersive x-ray spectroscopy. The nucleation processes of the GaN onSc₂O₃ buff er are followed in-situ by reflection high energy electron diffraction and the interface chemistry is analyzed by means of x-ray photoelectron spectroscopy. Results: It is found, that the Sc₂O₃/ Y₂O₃ buffer approach provides a template of high structural quality for GaN overgrowth. The bi-layer buffer plays a lattice match mediator role between GaN and Si and acts as a barrier against impurity diffusion. GaN grown on Sc₂O₃/ Y₂O₃/Si(111) templates is single crystalline with a wurtzite structure and (0001) oriented. Due to the -8\% lattice mismatch between GaN and Sc₂O₃, GaN growth proceeds by the nucleation of 3D islands. The size of the islands, coalescence time and the relaxation process depend on the GaN growth conditions and have a strong influence on the topography of closed layers, crystalline quality (defect density) as well as optical properties. The best GaN material parameters are obtained for the layers grown in Ga-rich regime when the Ga/N ratio is slightly higher than unity. The main three defects found in the µm-thick GaN layers are a) threading dislocation, with density in the order of 10^10 cm-2, b) stacking faults, resulting in cubic inclusions in the hexagonal matrix and c) inversion domain boundaries causing Ga-polar regions in the mainly N-polar film. A theoretical GaN/Sc₂O₃ interface model is discussed to explain these experimental findings. Despite the relatively large number of structural defects, photoluminescence shows sharp and strong donor-bound exciton transition and very low intensity yellow emission, which indicate that GaN layers grown on Sc₂O₃/ Y₂O₃/Si(111) are promising for future optoelectronic applications. Outlook: Future growth strategies will focus on interface engineering approach to further reduce the lattice mismatch between GaN(0001) and Sc₂O₃ (111) surfaces, enable growth of unipolar GaN films and trigger the occurrence of an early 2D-like growth mode to avoid cubic GaN inclusions and guarantee low threading dislocation densities.}, subject = {Lumineszenzdiode; Galliumnitrid; MOCVD-Verfahren; GaN auf Si; Oxidpuffer; Heteroepitaxie; GaN on Si; Heteroepitaxy; Oxide buffer}, language = {en} } @phdthesis{Skibitzki2013, author = {Skibitzki, Oliver}, title = {Material Science for high performance SiGe HBTs : Solid-Phase Epitaxy and III-V/SiGe hybrid approaches}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus-29333}, school = {BTU Cottbus - Senftenberg}, year = {2013}, abstract = {The complexity of today´s microelectronic circuitry is not only driven by complementary metal oxide semiconductor (CMOS) scaling, but also by integration of high performance modules for various applications (e.g. wireless and broadband communication systems). These mixed signal circuitries are build up by combining digital CMOS technology with analog SiGe:C hetero-bipolar transistors (HBT) known as SiGe:C BiCMOS technology. State-of-the-art SiGe:C BiCMOS technologies achieve up to the 500 GHz. Nevertheless, Si as semiconductor material is approaching more and more its physical limits, whereby novel approaches have to be found to ensure the future development of SiGe:C HBT BiCMOS technology in order to push the maximum frequency further into the Terahertz regime. Based on this task, two novel material science strategies are investigated in this Ph.D. thesis in terms of material growth and defect studies: A.) Solid-phase epitaxy (SPE) for emitter and base resistivity: This technique has been investigated for local engineering of crystallinity in emitter and base layer of already established SiGe:C HBT technology in order to improve the speed performance. By introducing disilane as new gas source with respect to standard used silane, it is possible to reduce the CVD growth temperature for Si, enabling the differential growth of epitaxial-Si (epi-Si) on Si and amorphous Si (a-Si) on the SiO2 and Si3N4 masks. The so produced requirement for SPE treatments is evaluated for two possible areas of application: A1.) Emitter region and A2.) Base region. In both cases, SPE techniques are applied to change the standard polycrystalline-Si (poly-Si) emitter and base link area on the SiO2 and Si3N4 masks to a fully epi-Si area in order to lower emitter and base resistivity, respectively. B.) III-V/SiGe hybrid device: The ternary compound semiconductor In1-xGaxP [x=0-1] is introduced as potential new collector material as part of an III-V/SiGe hybrid HBT device. With InP having a three times higher saturation velocity, and GaP having a two times bigger bandgap than Si, this approach offers the possibility to adjust speed and power performance of HBTs in a flexible way as a function of the In1-xGaxP collector chemical composition x. The material growth and defect studies in this Ph.D. thesis produced insights, which lead to the following results for future device application: A1.) SPE for emitter region: After investigating the temperature, time and doping concentration dependence on lateral SPE length of in-situ annealed As-doped epi-Si/a-Si test structures, it was possible to crystallize up to 500 nm of a-Si on SiO2 and Si3N4 masks to epi-Si with low defect densities by a combination of 575 °C and 1000 °C postannealing. A2.) SPE for base region: After studying the dependence of time, temperature, thickness, SiO2-capping and Ge incorporation on lateral SPE length of in-situ annealed undoped epi-Si/a-Si test structures, it was possible to crystallize up to 450 nm of SiO2-capped undoped a-Si on SiO2 mask to low-defective epi-Si by 570 °C postannealing. Finally, this technique is applied in a SiGe:C base model structure in order to show the possibility to widen the monocrystalline region around the bipolar window, which results in a possibly improved base resistivity. B.) GaP/Si0.8Ge0.2/Si(001) heterostructure: For pseudomorphic GaP/Si0.8Ge0.2/Si(001) heterostructure growth, the critical thickness of GaP on Si and maximum thermal budget for GaP deposition is evaluated. A detailed structure and defect characterization study by XRD, AFM, and TEM is reported on single crystalline 170 nm GaP/20 nm Si0.8Ge0.2/Si(001) heterostructure. Results show that 20 nm Si0.8Ge0.2 on Si(001) can be overgrown by 170 nm GaP without affecting the pseudomorphism of the Si0.8Ge0.2/Si(001) systems. The GaP layer grows however partially relaxed, mainly due to defect nucleation at the GaP/Si0.8Ge0.2 interface during initial island coalescence. The achievement of 2D GaP growth conditions on Si0.8Ge0.2/Si(001) systems is thus a crucial step for achieving fully pseudomorphic heterostructures. Anti-phase domain-free GaP growth is observed for film thicknesses beyond 70 nm. In addition, no detrimental impurity diffusion could be found in the GaP/Si0.8Ge0.2/Si(001) heterostructure. Finally, it is to mention that further investigation and efforts are still needed to push these new approaches to full integration into SiGe:C HBT BiCMOS technology concepts: A.) For SPE application: Electrical studies are needed in frame of full processed devices to evaluate the value and required modifications for process integration. B.) For III-V/SiGe hybrid device: Future work has to focus on improved 2D GaP layer conditions (before introducing InP) in order to prepare truly pseudomorphic GaP/Si0.8Ge0.2/Si(001) heterostructures with low defect densities. For this purpose, selective GaP growth studies in local HBT Si0.8Ge0.2/Si(001) mesa structures are the next step.}, subject = {Halbleiter; Epitaxie; Heterostruktur; Hetero-bipolar-Transistor; Festphasenepitaxie; III-V/SiGe Hybridbauteil; Materialwissenschaft; Halbleiterphysik; Heterojunction bipolar transistor; Solid-Phase Epitaxy; III-V/SiGe hybrid device; Material science; Semiconductor physics}, language = {en} } @phdthesis{SoltaniZarrin2021, author = {Soltani Zarrin, Pouya}, title = {Permittivity biosensor for the recognition of saliva samples of COPD patients using neuromorphic-based machine learning}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-55016}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {Chronic Obstructive Pulmonary Disease (COPD) is an inflammatory lung disease, causing breathing difficulties in patients due to obstructed airflow in lungs. COPD is one of the main leading causes of death worldwide with an annual mortality rate of three million people. Despite the absence of an effective treatment for COPD, an early-stage diagnosis plays a crucial role for the effective management of the disease. However, majority of patients with objective COPD go undiagnosed until late stages of their disease due to the lack of a reliable technology for the recognition and monitoring of COPD in Point-of-Care (PoC). Alternative diagnostic approaches such as the accurate examination of respiratory tract fluids like saliva can address this issue using a portable biosensor in a home-care environment. Nonetheless, the accurate diagnosis of COPD based on this approach is only possible by concurrent consideration of patients demographic--medical parameters. Therefore, Machine Learning (ML) tools are necessary for the comprehensive recognition of COPD in a PoC setting. On the other hand, drawbacks of cloud-based ML techniques for medical applications such as data safety, immerse energy consumption, and enormous computation requirements need to be addressed for this application. Therefore, the objective of this thesis was to develop a ML-equipped system for the management of COPD in a PoC setup. A portable permittivity biosensor was developed in this work and its in-vitro performance was evaluated throughout clinical experiments. ML techniques were applied on biosensor results, demonstrating the significant role of these algorithms for the recognition of COPD. Moreover, developed ML models were deployed on a neuromorphic platform for addressing the shortcomings of cloud-based approaches.}, subject = {BiCMOS permittivity biosensors; COPD management; Saliva characterization; Bioneuromorphics; Machine learning in medicine; BiCMOS Permittivit{\"a}ts-Biosensoren; COPD-Management; Speichelcharakterisierung; Bioneuromorphie; Maschinelles Lernen in der Medizin; Obstruktive Ventilationsst{\"o}rung; Speichel; BICMOS; Biosensor; Maschinelles Lernen}, language = {en} } @phdthesis{Kozlowski2012, author = {Kozlowski, Grzegorz}, title = {On the compliant behaviour of free-standing Si nanostructures on Si(001) for Ge nanoheteroepitaxy}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus-24512}, school = {BTU Cottbus - Senftenberg}, year = {2012}, abstract = {Due to its superior optoelectronic properties, Germanium (Ge) is attracting increasing interest to build up future photonic modules within Si chip baseline technology. Despite clear advantages of Ge integration in Si technology (identical diamond crystal structure with Si, complementary metal oxide semiconductor (CMOS) compatibility due to no contamination risks etc.), it faces also some true challenges limiting the optoelectronic performance. Among them, thermal and lattice mismatch result in too high defect levels (which act as non-radiative recombination centres). Parasitic diffusion and formation of SiGe alloys at elevated temperatures is also a common problem. In this respect, selective chemical vapor deposition Ge heteroepitaxy approaches for high quality Ge nanostructure growth with reasonable thermal budget must be developed for local Ge photonic module integration. A promising vision is offered by the compliant substrate effects within nanometer scale Ge/Si heteroepitaxial structures. Here, in contrast to the classical Ge deposition on bulk Si substrates, the thermal and lattice mismatch strain energy accumulated in the Ge epilayer is partially shifted to the free-standing Si nanostructure. This strain partitioning phenomenon is at the very heart of the nanoheteroepitaxy theory (NHE) and, if strain energy levels are correctly balanced, offers the vision to grow defect-free nanostructures of lattice mismatched semiconductors on Si. In case of the Ge/Si heterosystem with a lattice mismatch of 4.2\%, the strain partitioning phenomenon is expected to be triggered when free-standing Si nanopillars with the width of 50 nm and below are used. In order to experimentally verify NHE with its compliant substrate effects, a set of free-standing Ge/Si nanostructures with diameter ranging from 150 to 50 nm were fabricated and investigated. The experimental verification of compliant substrate effects is challenging and requires sophisticated characterization techniques. The main limitation corresponds to a simultaneous detection of a) the strain partitioning phenomenon between Ge and Si and b) the absence of defects on the nano-scale. In this respect, synchrotron-based grazing incidence x-ray diffraction was applied to study the epitaxial relationship, defect and strain characteristics with high resolution and sensitivity in a non-destructive way. Raman spectroscopy supported by finite element method calculations were used to investigate the strain distribution within a single Ge/Si nanostructure. Special focus was devoted to transmission electron microscopy to determine the quality of the Ge epilayer. It was found, that although high quality Ge nanoclusters can be achieved by thermal annealing on Si pillars bigger than 50 nm in width, no proof of strain partitioning phenomenon was observed. In clear contradiction to the present NHE theory, no strain partitioning phenomenon was found even for ~50 nm wide Si pillars for which the compliant substrate effects are expected. The absence of the strain partitioning between Ge and Si is caused by the stress field exerted by the SiO2 growth mask on the Si nanopillar. In contrast to such nanostructures monolithically prepared from a Si(001) wafer, first results in this thesis clearly prove the strain partitioning phenomenon within Ge/Si nanostructures on Silicon-on-insulator substrate. Here, the compliant substrate effects were clearly observed for pillar widths even bigger than 50 nm. This experimental work demonstrates, that NHE with its compliant substrate effects, offers an interesting approach for high quality Ge nanostructures on Si, avoiding even the misfit dislocation network with its non-tolerable electrical activity in Ge nanodevices. However, the theory does not yet include important aspects of thin film growth on the nano-scale and must be further developed. It is the aim of this PhD thesis to provide this experimental basis for the Ge/Si heterosystem. Finally, it is noted that here developed growth approach is fully Si CMOS compatible and is not only relevant for Ge integration but also for other lattice mismatched alternative semiconductors (GaAs etc.) to enable higher performance / new functions in future Si microelectronics technologies.}, subject = {Heteroepitaxie; Germanium; Silizium; Heteroepitaxie; R{\"o}ntgenbeugung; Raman Spektroskopie; Germanium; Silicon; Heteroepitaxy; X-ray diffraction; Raman spectroscopy}, language = {en} } @phdthesis{Grzela2015, author = {Grzela, Tomasz}, title = {Comparative STM-based study of thermal evolution of Co and Ni germanide nanostructures on Ge(001)}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-36234}, school = {BTU Cottbus - Senftenberg}, year = {2015}, abstract = {Since 1947, when Bardeen and Brattain initiated the era of microelectronics by constructing the first Germanium (Ge) transistor, semiconductors have become the main material platform for advanced integrated circuit (IC) technologies. Later on, given in particular the electrical stability of its native oxide, IC technology shifted from Ge to Silicon (Si) substrates and the dominance of Si-based complementary metal oxide semiconductor (CMOS) microelectronics is today unquestionable. However, as the semiconductor industry is approaching the limits of traditional Si CMOS scaling, the integration of new materials into Si micro- and nano-electronics is required to extend the performance and functionality of future CMOS-based IC technologies. Recently, Ge due to its superior optoelectronic properties and compatibility with conventional Si CMOS technology has re-emerged as an alternative semiconductor material on the mainstream Si technology platform. Many of the Ge integration challenges, such as e.g. doping, epitaxial quality etc., have been recently solved or minimized to an acceptable level. However, the fabrication of low resistance, thermally stable metal/Ge contacts is still one of the main barriers towards the full use of the potential offered by Ge. In particular, the formation of ohmic contacts is relevant for applications where high current densities are of importance (i.p. Ge p-MOSFET and Ge laser applications). Consequently, intensive investigations of metal/Ge contacts are imperative for future applications of Ge. Various metal/Ge contact systems were studied and demonstrated good thermal stability and promising electrical properties. However, given their widespread use in Si CMOS technologies in form of their respective silicides, Co- and Ni-germanides seem to be an obvious choice for electrical contacts in Ge-based devices. Both metal/Ge systems exhibit a complex bulk phase diagrams with a wide range of different physical properties. It is generally acknowledged that the stoichiometric CoGe2 and NiGe phases are best suited for ohmic metal contact formation, mainly due to their low resistivity. It is worth noting that the bulk phase diagram is limited in its use for nanoscience due to an increased surface/volume ratio as well as by the strong nanostructure/substrate interface influence. This PhD thesis sheds light on the formation process at the atomic level of Co and Ni germanide nanostructures on clean, reconstructed Ge(001) substrates. The main part of the presented research is based on in-situ scanning tunneling microscopy (STM) studies on the influence of subsequent, post-evaporation annealings at various temperatures in order to follow and investigate on the nano-scale the structural evolution of a few monolayers of Co and Ni metal (deposited at RT and in UHV conditions) on an atomically clean, reconstructed Ge(001) surface. Furthermore, additional techniques like LEED, (S)TEM-EDX and XPS were used to corroborate and complement the STM derived insights. It was demonstrated that - for both investigated systems - room temperature deposition of a few metal monolayers on clean Ge(001) results in a Volmer Weber growth mode. Starting with annealing treatments at relatively low temperature ranges, the formation of a continuous MetalxGey wetting layer from as-deposited 3D metal clusters on Ge(001) was detected. It should be noted that a very flat wetting layer was observed for the Co/Ge(001) system, which is different for the Ni/Ge(001) system where inhomogeneous terraced domains were formed. Finally, the 2D wetting layer gradually evolves with increasing temperature into well-ordered 3D MetalxGey nanostructures, surrounded by clean, reconstructed Ge(001). Analysis of these Co and Ni germanide nanostructures shows that the growth mechanism is different: in particular the Ni/Ge system is more reactive by means of Ni bulk diffusion and results in 3D Ni germanide nanostructures which show a strong tendency to be embedded into the Ge(001) substrate. In contrast, Co germanide nanostructures are situated initially on top of the Ge(001) substrate due to the fact that Ge diffusion dominates in the low temperature range. Only at higher annealing temperatures, Co diffusion into the bulk occurs and Co germanide nanostructures penetrate into the Ge substrate. For the Co- as well as Ni-Germanide system, the nanostructures undergo Ostwald ripening phenomena in the high temperature range. The present PhD thesis thus allows to understand on the nano-scale the main growth and reaction mechanisms of the Walser and Ben{\`e} rule set up about 40 years ago to describe metal/semiconductor interface reaction on the macro-scale.}, subject = {Scanning Tunneling Microscope; STM; Germanium; Cobalt germanides; Nickel germanides; Rastertunnelmikroskop; Nickel Germanide; Kobalt Germanide; Intermetallische Verbindungen; Schichtwachstum; Nanostruktur; Germanide; Rastertunnelmikroskop; Halbleiter}, language = {en} } @phdthesis{Sowinska2014, author = {Sowinska, Malgorzata}, title = {In-operando hard X-ray photoelectron spectroscopy study on the resistive switching physics of HfO2-based RRAM}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-30076}, school = {BTU Cottbus - Senftenberg}, year = {2014}, abstract = {Current memory technologies, such as DRAM, SRAM, and NAND Flash, which are approaching very difficult issues related to the continuous scaling to and beyond the 16 nm generation, has led research over the past two decades to the discovery of several new memory technologies. In recent years, new emerging nonvolatile memories (NVMs), such as phase-change random access memory (PCRAM), ferroelectric random access memory (FRAM), magnetic random access memory (MRAM), and resistive random access memory (RRAM), have been intensively studied. Among these candidates, RRAM is a very promising and worldwide studied candidate for alternative NVM and a high potential successor for Flash in terms of energy consumption (write current in the μA range compared to mA) and simplicity of process integration. A fully CMOS compatible TiN/Ti/HfO2/TiN RRAM module was successfully integrated with a select transistor (1T1R memory) in IHP's technology. Nonetheless, reliability and insufficient understanding of the resistive switching mechanism are the two main issues limiting this memory technology development for e.g. wireless sensor network (WSN) applications. The still unclear atomic-scale mechanism of HfO2-based resistive switches and the identification of the material changes within the insulator must be addressed to suggest a knowledge-based improvement of device performance. In this frame, the Ti/HfO2 interface is thoroughly investigated in this Thesis by complementary materials science techniques. First, the investigation of the as-deposited Ti/HfO2/TiN cells revealed that: (1) the Ti layer scavenges oxygen atoms stronger from amorphous (a-HfO2) than from monoclinic (m-HfO2) HfO2 films; (2) not only oxygen vacancies but also other impurities in the atomic vapor deposited (AVD) a-HfO2 film, such like nitrogen and carbon (probably resulting from the used AVD precursor chemistry) are present in the HfO2 insulator. Next, the electrical characterization of Ti/AVD a-HfO2/TiN cells (with voltage applied to the Ti top electrode while TiN bottom electrode was grounded) revealed a clockwise bipolar resistive switching behavior after an electroforming process at positive voltage polarity. Besides, the chemical and electronic changes observed by hard X-ray photoelectron spectroscopy (HAXPES), indicate the creation of n-type dopants in the a-HfO2 film during the electroforming process, probably related to the formation of positively charged oxygen vacancies in a-HfO2 by the electrochemically induced Ti/a-HfO2 interface oxidation. In order to directly compare electrical with electronic and chemical changes of one and the same RRAM cell, an in-operando HAXPES technique was developed. These unique studies have revealed the following characteristics of the Ti/AVD a-HfO2/TiN cells: (1) the as-deposited cells are able to switch at low electrical power; (2) However, this resistive switching is not stable and an electroforming process with a slightly increased power is required to stabilize the switching event; (3) Electrical changes correlated with HAXPES results and literature indicate that (i) the forming/set electrical power defines the oxygen vacancies concentration in the a-HfO2 and thus the stability of the resistive switching properties and (ii) the stable resistive switching can be described by a push-pull model of oxygen vacancies migration under the influence of an electrical field; (4) Besides, carbon segregation at the Ti/a-HfO2 interface - while increasing the electrical power or cycling the device - shows that the defects physics is not limited only to oxygen vacancies; other defects may thus contribute under electrical stress to the resistive switching phenomenon and need to be included in theoretical models to correctly describe the switching characteristics. Finally, according to the presented HAXPES results, the Ti/AVD a-HfO2/TiN RRAM cells are classified to the valence change mechanism. The resistive switching mechanism is attributed to the creation and rupture of oxygen vacancies-based conducting filaments and the Ti/HfO2 interface oxidation is of central importance for the defect balance of the RRAM cell. Most importantly, a reduction of carbon content in the AVD-deposited HfO2 improved the reliability of these memory cells.}, subject = {RRAM; RRAM; HfO2; Sauerstoff-Fehlstellen; Widerstandsschaltmechanismus; Defekte; HfO2; Oxygen vacancies; Resistive switching mechanism; Defects; R{\"o}ntgenspektroskopie; Defekt; FRAM }, language = {en} } @phdthesis{Kayser2021, author = {Kayser, Stefan}, title = {The lateral photovoltage scanning method to probe spatial inhomogeneities in semiconductors: a joined numerical and experimental investigation}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-54359}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {The Lateral-Photovoltage-Scanning-Method (LPS) operates well for Si, Ge and Si_{1-x}-Ge_x for an analysis in defect regions below one part per million, where Secondary Ion Mass Spectroscopy (SIMS) or X-Ray Fluorescence (XRF) signals fall below its detection limit. Although LPS is well established since 1999, it is still poorly investigated. We used a computational simulation finite volume (FVM) approach, solving the van-Roosbroeck equations in three dimensions using a MUltifrontal Massively Parallel sparse direct Solver MUMPS. The signal transport is simulated by solving the Maxwell equations in two dimension for different sample geometries. It could be shown that a typical LPS-measurement is distorted due to the samples geometry (except cuboid). This distortion can be simulated, understood and recalculated, as discussed for trapezoidal or cylindrical samples. Also using the signal generation simulation of this measurement technique it can be shown, that the measurement signal is convoluted depending on the inherent minority charge carrier life time reducing the local resolution. An investigation of the local resolution were made using a Gaussian function as the convolution function of this method. A comparison of simulations to real measurements was discussed on silicon samples with boron implantation pattern. In 1955 Tauc already stated that the bulk photovoltaic effect, causative for the LPS measurement set-up, could be used detecting any quantity, which affects the band structure of a semiconductor.As strain is coupled to the conduction and valence band profiles by the deformation potential theory by van-de-Walle, we investigated the possibility to detect strain variations using LPS simulations. For an n-type Si sample with an on-top stressor stripe (silicon-nitride) the strain distribution in Si got calculated by finite elemente simulation (FEM) using solid mechanics module. By directly converting the strain profile to a single conduction and valence band, FVM LPS simulations were performed. It could be shown, that the LPS voltage can be connected to hole traps caused by the conduction and valence band profile. Therefore we can finally conclude, that the LPS measurement set-up is suitable measuring conduction and valence band variations caused by strain.}, subject = {Silicon; Finite-volume simulation; Lateral photovoltage scanning; van Roosbroeck system; Deformation potential theory; Silicium; Finite Volumen Simulation; Lateral Photovoltage Scanning; Deformationspotential Theorie; Deformationstheorie; Finite-Volumen-Methode; Computersimulation; Laserscanner; Silicium}, language = {en} } @phdthesis{Zoellner2014, author = {Z{\"o}llner, Marvin Hartwig}, title = {Microelectronics meets catalysis: An interdisciplinary approach on the structure-property relationship of single crystalline Ce1-xPrxO2-δ films on Si(111)}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus-30687}, school = {BTU Cottbus - Senftenberg}, year = {2014}, abstract = {Motivation: Ceria attracted a lot of attention for microelectronics (e.g. high-k gate oxide, buffer layer for heteroepitaxy) and catalysis (e.g. selectiveoxidative and dehydrogenating reactions), due to its inherent structural (similar crystal structures and small lattice mismatch with respect to silicon) and electronic (Ce4+/Ce3+ valence state variation and formation of oxygen vacancies) properties. Thus, single crystalline epitaxial ceria thin films are well investigated. Although, the neighbouring rare earth oxide, praseodymia, exhibits similar properties, this system is much less studied due to its complex phase diagram. Since both oxides exhibit a flexible structural (polymorphism) and electronic (valence state variation) behavior, it is of ongoing interest to study ceria-praseodymia mixed oxide thin films, in order to tune and improve certain characteristics for the respective applications in the field of microelectronics and catalysis. Goal: Therefore, the goal of this doctoral thesis is to grow and characterize in an interdisziplinary approach single crystalline and epitaxial, binary and ternary Ce1-xPrxO2-δ thin films in order to allocate high quality samples for further fundamental studies, devoted to the structural and electronic properties in the field of microelectronics and catalysis. Experimental: Such single crystalline and epitaxial Ce1-xPrxO2-δ thin films were grown on a Si(111) substrate by molecular beam epitaxy. An in-situ control of the crystal growth quality was achieved by reflection high-energery electron diffraction. A detailed structure characterization study was carried out by laboratory and synchrotron based X-ray scattering. Additionally, transmission electron microscopy gives a highly resolved structural insight. The structural characterization was supported by theoretical ab-initio calculations. To determine the stoichiometries and valence states of the ternary mixed oxide compounds, X-ray photoelectron spectroscopy was performed. The microscopic defect structure was investigated by Raman spectroscopy. Finally, a first insight into the catalytic behavior is gained by temperature programmed desorption experiments. Results: The structural investigation implicates an epitaxial, twin-free, exclusively type-B oriented CeO2(111) growth on Si(111) by using an ultra-thin hex-Pr2O3(0001) buffer layer. This became possible due to the crystallographic continuation of the oxygen sub-lattice and electronic conservation of the semiconducting behavior at the ceria/praseodymia interface. A stabilization of Pr4+ cations is predicted by ab-initio calculations to support this interface transition. On such a hex-Pr2O3(0001)/Si(111) support the growth of epitaxial ternary Ce1-xPrxO2-δ mixed oxides became also possible. A stoichiometry dependent study also implicates an interplay of the structural and electronic properties. In dependency on the Pr content, it turned out that truly mixed alloys with Pr3+ incorporation into the CeO2 fluorite crystal matrix and Ce3+ incorporation into the hex-Pr2O3 matrix were achieved. Between both extremes, it is shown that the Pr content leads to a higher tendency to form Ce3+ cations within a bixbyite lattice, but fluorite inclusions could not be excluded. In a first temperature dependent study on the reduction behavior, it was demonstrated by the linearly increasing behavior of the integral O2 desorption signal and the total lattice spacing difference of heated Ce1-xPrxO2-δ mixed oxides that the oxygen storage capacity can be tailored by Pr doping due to the Pr4+/Pr3+ redox system. Furthermore, it was found that the hydrocarbon oxidation process is mainly triggered by the Ce4+/Ce3+ redox system, since the desorption temperature of CO2 decreased with increasing Ce content. Outlook: In terms of future investigations, such epitaxial single crystalline Ce1-xPrxO2-δ/Si(111) heterostructures are of interest in both research fields, catalysis and microelectronics. They can be used as model catalytic systems in order to gain a deeper understanding of the structure and electronic correlation with the reaction mechanisms by a stepwise increasing of the systems complexity under defined reaction conditions. Furthermore, new applications of such a system might be evaluated in the field of microelectronics. Oxygen vancancy engineering is currently discussed in such rare earth oxides to explain and establish room temperature ferromagnetism phenomena in the area of spintronics.}, subject = {Seltenerdoxide; Heteroepitaxie; D{\"u}nnschichttechnik; Seltenerd-Oxide; Si(111); Heteroepitaktische D{\"u}nnfilme; Ceroxid; Praseodymiumoxid; Rare-earth oxides; Si(111); Heteroepitaxial thin films; Ceria; Praseodymia}, language = {de} } @phdthesis{Petryk2024, author = {Petryk, Dmytro}, title = {Investigation of sensitivity of different logic and memory cells to Laser Fault Injections}, doi = {10.26127/BTUOpen-6664}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-66647}, school = {BTU Cottbus - Senftenberg}, year = {2024}, abstract = {Plenty of semiconductor devices are developed to operate with private data. To guarantee data privacy cryptographic algorithms are used, where the secrecy is based on the used keys. Theoretically, the cryptographic algorithms using keys with recommended lengths are secure. The issue is that a potential attacker can steal the devices and attack in a lab. Physical attacks are usually aimed to perturb normal operation of a device and to extract cryptographic keys, e.g. by means of fault injection (FI). One class of FI attacks exploits the sensitivity of semiconductor devices to light and are performed using a laser as the light source. This work investigates the sensitivity of different logic and memory cells to optical Fault Injection attacks. Front-side attacks against cells manufactured in different IHP technologies were performed using two different red lasers controlled by Riscure software. To reach the repeatability of the experimental results and to increase the comparability of the results with attack results published in literature the setup parameters as well as setting parameters of the Riscure software were experimentally evaluated. Attacks were performed against inverter, NAND, NOR, flip-flop cells from standard libraries, radiation-hard flip-flops based on Junction Isolated Common Gate technique, radiation-tolerant Triple Modular Redundancy registers as well as non-volatile Resistive Random Access Memory (RRAM) cells. The results of attacks against volatile circuits were successful transient bit-set and bit-reset as well permanent stuck-at faults. The results of attacks against RRAM cells were successful in the sense that manipulation of all RRAM logic states was feasible. The faults injected during the performed experiments were repeatable and reproducible. The goal of this work was not only to achieve successful FI but also to determine cell area(s) sensitive to laser illumination. Knowledge about areas sensitive to laser illumination can be used by designers to implement corresponding countermeasure(s) at the initial stage of chip development and is the necessary step to design appropriate countermeasures. For example, metal fillers can be applied as optical obstacles reducing the success of front-side FI attacks, i.e. as a possible low-cost countermeasure. Based on the knowledge of the sensitive cell areas, the placement of the metal fillers can be automated in the future, i.e. the findings given in the work can serve as a basis for a methodology development for improving resistance against optical FI attacks at the initial stage of chip development. Such methodology can be adapted for each chip manufacturing technology.}, subject = {Laser fault injection attacks; Resistive random access memory; Cell sensitive areas; Radiation-hard cells; Countermeasure; Laserfehlerinjektion-Angriffe; Resistiver Direktzugriffsspeicher; Empfindliche Zellbereiche; Strahlungsharte Zellen; Gegenmaßnahme; Halbleiter; Speicherzelle; Datenschutz; Kryptologie; Algorithmus}, language = {en} }