@phdthesis{Reichmann2022, author = {Reichmann, Felix}, title = {Germanium, Zinn und (Zink-) Galliumoxid f{\"u}r fortschrittliche Mikro- und Optoelektronik : Einblicke in die elektronische Struktur der Oberfl{\"a}che mit Photoemissionstechniken}, doi = {10.26127/BTUOpen-6208}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-62080}, school = {BTU Cottbus - Senftenberg}, year = {2022}, abstract = {Historically, Ge is one of the oldest materials in the semiconductor industry and its (001) surface has been the subject of extensive investigations by photoelectron spectroscopy. I am going to challenge the predominant attribution of a semi-conducting nature of the Ge(001) surface in this thesis. My investigations reveal the presence of a Ge(001) surface state above the Fermi-level, occupied at room temperature. Employing time- and temperature-dependent angle-resolved photoelectron spectroscopy, I will demonstrate that the presence of this surface state is evidence for the conducting nature of the surface at room temperature. Sparked by the remarkable properties of the GeSn-alloy and a trend towards Ge-Sn-related multiquantum well fabrication, I investigate the surface electronic structure of Ge(001) after adsorption and incorporation of Sn. With an in-depth analysis of surface core-level shifts, I will extend the growth model of the Sn wetting layer formation by also detailing structural changes in the subsurface region. At the same time, the modifications of the electronic structure will be detailed, observing the removal of the Ge(001) surface states, the creation of a new, Sn-related surface state and the initial stages of the Schottky barrier formation. β-Ga₂O₃ a transparent semi-conducting oxide that has sparked a lot of interest over the last decade, because it offers an ultra-wide band gap and high break down voltage. However, due to its monoclinic crystal structure, device fabrication is rather challenging and researchers are already looking into alternative materials. One of these candidates is ϵ-Ga₂O₃ and this work presents a combined study by photoelectron spectroscopy and ab initio calculations of its electronic structure. (Hard) X-rays reveal the impact of photoelectron recoil and the absence of a band bending to the surface, while the dispersion of experimentally determined valence states compares favorably with the calculations based on hybrid density-functional theory. Another alternative to β-Ga₂O₃ be ZnGa₂O₄ and I will present an investigation on the electronic structure of its (100) surface. Due to the novelty of ZnGa₂O₄ single-crystals, I am first going to explore the preparation of a clean and well-ordered surface by standard in-situ sputtering and annealing. I will show that already low annealing temperatures induce Zn-deficiency, leading to non-stoichiometric surfaces, further exacerbated by sputtering. By changing the sputtering parameters and the annealing conditions, the preparation of a surface with sufficient quality for subsequent investigations will be demonstrated. The results by photoemission techniques compare favorably with the expectations from theory and allowing the first fundamental insights into the surface electronic structure.}, subject = {Angle-resolved photoemission spectroscopy; X-ray photoelectron spectroscopy; Germanium-tin; Zinc gallium oxide; Surface science; ARPES; Gallium-Zink-Oxid; XPS; Halbleiteroberfl{\"a}che; Bandstruktur; Elektronenstruktur; Germaniumverbindungen; Galliumverbindungen; ARPES; R{\"o}ntgen-Photoelektronenspektroskopie}, language = {en} } @phdthesis{PerezBoschQuesada2024, author = {Perez-Bosch Quesada, Emilio}, title = {In-depth electrical characterization of HfO₂-based memristive devices for their integration in CMOS-compatible neuromorphic systems}, doi = {10.26127/BTUOpen-6781}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-67815}, school = {BTU Cottbus - Senftenberg}, year = {2024}, abstract = {The rapid development of information and communication technologies is reaching critical limits that might compromise the global digitalization progress, one of the main economy pillars nowadays. Among others, limits like the end of Moore's law, derived from miniaturization issues in nano-scale devices; the need for massive data processing parallelization due to the ever-increasing amount of data generated in every single aspect of our daily routine; and the acute increase of the annual electricity consumption in data center due to energy inefficiency in their computational architectures. Therefore, the need for partial or complete migration of current computing paradigms towards more sustainable ones is of paramount importance to bypass these limits. Neuromorphic computing systems inspired by the neural and synaptic activity of the human brain irrupted as an innovative alternative to merge memory and computing units, traditionally separated following the von Neumann architecture. Emerging non-volatile memory technologies, specifically the Resistive Random Access Memory (RRAM) technology, are playing important roles in the development of new computing paradigms due to their outstanding properties, namely, fast switching, high scalability, long state retention and their multilevel-cell capabilities, among others. The later stands out as a key feature to increase memory densities at lower area cost and it lately gathered special interest concerning neuromorphic applications. Due to the uncertainty surrounding the stochastic processes governing the resistive switching of the RRAM technology, here is still scarce number of real RRAM-based hardware implementations. In this work, motivated by the impact of the inherent stochasticity of the RRAM technology on neuromorphic systems' performance, a thorough wafer-scale electrical characterization is carried out over HfO2-based RRAM devices to study their quasistatic response. Their non-idealities are identified, in a way that they could be modelled and potentially mitigated to enhance the memristive devices stability and thus, their performance carrying out multiply-accumulate (MAC) tasks, fundamental operations for the implementation of artificial intelligence (AI) applications. This characterization supports the adaptation of three physics-based compact models and an empirical study of vector-matrix multiplication (VMM) operations performed using real RRAM devices for neuromorphic applications. The impact of the devices' non-idealities on the final operation results is assessed along consecutive VMMs. This work sets the baseline of the quasistatic characterization of IHP's RRAM devices and opens the way towards real ardware neuromorphic systems with such technology.}, subject = {Vector-matrix multiplications,; Neuromorphic computing; RRAM; Non-volatile; Vektor-Matrix-Multiplikationen; RRAM; Neuromorphes Rechnen; Neuromorphing; Neuronales Netz; Resistive RAM}, language = {en} } @phdthesis{Franck2025, author = {Franck, Max}, title = {Synthesis of hexagonal boron nitride on CMOS-compatible substrates via chemical vapor deposition}, doi = {10.26127/BTUOpen-7192}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-71925}, school = {BTU Cottbus - Senftenberg}, year = {2025}, abstract = {About 20 years ago, the discovery of an easy method to exfoliate single atomic layers of graphene opened the door for the investigation of 2D materials. They often exhibit superior electrical and mechanical properties compared to their 3D counterparts, and in addition, entirely new physical properties emerge at these ultra-low thickness scales, making 2D materials a highly interesting topic of materials research. A large variety of 2D materials with various electrical properties have since been discovered: graphene is a conductor with an extremely high charge carrier mobility, several transition metal dichalcogenides are direct bandgap semiconductors with the bandgap value being dependent on the chemical composition, and hexagonal boron nitride (hBN) is an insulator. This means that, in principle, all the building blocks for 2D microelectronic devices are available, which would mark the ultimate miniaturization. In practice, this vision is far from being realized, as large-scale fabrication methods for 2D materials and their heterostructures are still under development. Hexagonal boron nitride has a large range of applications, as it plays a central role in 2D microelectronics: not only are dielectrics a crucial part of microelectronic devices, but hBN is also necessary to shield other 2D materials from contact with the 3D environment, which causes deterioration of their intrinsic properties. Further potential applications are deep UV optoelectronics, thermal neutron detection, and single-photon emitters for quantum communication. While synthesis of single-crystalline hBN monolayers and high-quality multilayers has been demonstrated on a 2" wafer scale, it relies on catalytic transition metals, such as Cu, as the growth substrates. Obviously, one layer does not a device make, and thus transfer of the grown hBN films is usually employed to fabricate full devices. Unfortunately, this leaves behind metal contaminations at concentrations that are incompatible with the stringent purity requirements in CMOS manufacturing lines. In order to facilitate integration of 2D materials into established CMOS technology, which is deemed the most promising route for their large-scale adoption, synthesis of hBN on CMOS-compatible substrates, such as Si, Ge, and dielectrics, is desirable. At the beginning of my work, almost no literature on this topic was available, especially not for Ge and Si substrates. In this thesis, a growth process for hBN on Ge(001) via high-vacuum chemical vapor deposition is developed. The influence of various process parameters on the morphology, structure, and crystalline quality of the grown films is studied, and the growth process is optimized towards ultra-thin, smooth, and high-quality hBN. Additionally, the efficacy of standard characterization methods is evaluated and alternatives are explored. Furthermore, the optimized growth process is applied to Si(001) and graphene growth substrates, also yielding high-quality hBN films.}, subject = {Chemical vapor deposition; Hexagonal boron nitride; 2D materials; Thin film deposition; Chemische Gasphasenabscheidung; Hexagonales Bornitrid; 2D-Materialien; D{\"u}nnschichtabscheidung; Zweidimensionales Material; D{\"u}nnschichttechnik; Bornitrid; Hexagonaler Kristall; CVD-Verfahren}, language = {en} } @phdthesis{Schlipf2024, author = {Schlipf, J{\´o}n Benedikt}, title = {Enhancement of group-IV optoelectronic sensing devices through materials engineering and nanostructuring}, doi = {10.26127/BTUOpen-6797}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-67979}, school = {BTU Cottbus - Senftenberg}, year = {2024}, abstract = {Driven by the continuous research progress in integrated electronics towards increasing complexity and miniaturization, semiconductor technology has not only yielded very powerful electronic devices, but also provided the necessary tools for miniaturization of mechanical, optical and other functions into micro- and nanoscale devices. While transistor scaling approaches the physical limits mainly governed by heat dissipation, further advances are predicted to stem from the integration of additional functionality into integrated circuits instead. For the case of photonics and optoelectronics, which have plenty of applications in computing, communications and sensing, silicon devices have been applied commercially for several years. While being compatible with mainstream electronics, silicon does not offer the optimum properties for mediation between optics and electronics compared to, for example, III-V materials. To alleviate this, properties can be improved both through wavelength-scale structuring and exploitation of resonances, and through alloying with other group-IV materials like germanium and tin. Both of these avenues are studied within this work. On one hand, nanophotonic structures, most notably metasurfaces, and corresponding simulation and optimization algorithms, are developed for selective filtering and enhancement of light-matter interactions. On the other hand, group-IV materials are studied, most notably their non-destructive characterization with optical methods.}, subject = {Metasurface; Group-IV; Plasmonics; Photodetector; Nanophotonik; Plasmonik; Gruppe-IV-Materialien; Integrierte Schaltung; Nanophotonik; Plasmonik; Silicium; Germanium}, language = {en} } @phdthesis{KalishettyhalliMahadevaiah2023, author = {Kalishettyhalli Mahadevaiah, Mamathamba}, title = {Process development and electrical characterization of CMOS-integrated memristive devices for emerging non-volatile memory applications}, doi = {10.26127/BTUOpen-6557}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-65571}, school = {BTU Cottbus - Senftenberg}, year = {2023}, abstract = {Energy efficiency is vital for future low-power electronic applications. This ultra-low power consumption requirement enables the research beyond the conventional charge-based memories. Further, reliability, high scalability, fast switching, CMOS compatibility, high endurance, etc., are some of the characteristics envisaged by the new generation of emerging non-volatile memories (NVMs). A memristor or OxRAM is one among the many emerging NVMs, which can exhibit the aforementioned characteristics, and it has the potential to replace the power-hungry conventional NVMs. The memristive devices have the advantage of monolithic integration with the CMOS logic, which enables the widening of their application areas. Despite their various advantages, the reliability, forming voltages, and variability of the devices pose a hurdle to their wide commercial usage. Hence, it is crucial to identify these factors and mitigate them. This thesis addresses these issues through fabrication process improvements, electrical characterization techniques, and device-engineering methods. The improvements in the fabrication processes reduced the pristine state currents of the memristive devices. It impacted the reliability and resistive switching performance of the memristive devices directly. To further improve the performance, the memristive devices are integrated into the 130 nm BiCMOS baseline technology of IHP. Additionally, dedicated test structures are developed to monitor and control the fabrication process steps through in-line electrical characterization. Further, the forming current and voltage values, along with their dispersions in the 4 kbit memristive arrays, were reduced by utilizing the electrical characterization techniques. Accordingly, the forming operations were performed at high operating temperatures using incremental step pulse and verify algorithm (ISPVA). In contrast to the well-known method of increasing the current compliance (1R) or the gate voltage of the transistor (1T-1R) to increase the conduction filament size, a thin layer of Al2O3 is added. This device engineering technique reduced the variability in both LRS and HRS currents of the memristive devices. Additionally, the conduction filament properties in both states are modeled by using the quantum point contact (QPC) model. Finally, harnessing the intrinsic variability of the memristive devices for neuromorphic computing applications is demonstrated. The reliability of the devices is assessed through endurance and retention characteristics.}, subject = {Memristive devices; RRAM; ISPVA; Forming; Variability; Formierspannung; Variabilit{\"a}t; Dispersion; Leitungsdraht; Neuromorphe Anwendungen; CMOS; Nichtfl{\"u}chtiger Speicher; Memristor; Modellierung; Dispersion}, language = {en} } @phdthesis{Rizzi2024, author = {Rizzi, Tommaso}, title = {Investigation of the different abstraction levels for the design of RRAM-based systems}, doi = {10.26127/BTUOpen-6867}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-68677}, school = {BTU Cottbus - Senftenberg}, year = {2024}, abstract = {The great capabilities of modern electronics have brought in any aspect of our life innovations that were inconceivable before. This progress is enabled by a microelectronic market in continuous evolution, where novel solutions are introduced in order to fulfil the increasing requirements in terms of computing speed, energy efficiency, and area miniaturization. Among the various possibilities under the spotlight for thrusting the performance advancement in the next generation of computing systems, major chip manufacturers are carefully investigating emerging Non-Volatile Memory (eNVM) technologies, in particular Resistive Random Access Memory (RRAM). While it was originally studied as an alternative non-volatile memory medium, the research community has soon realized how this family of devices with their tunable resistance can lead to new efficient designs in a variety of applications. The protagonist of the renewed enthusiasm for this technology is the thriving Artificial Intelligence (AI) field, where RRAM can support the fabrication of analogue accelerators. More precisely, the dual nature of an RRAM array as memory block and computing unit has the potential to implement novel hardware solutions that take inspiration from the human brain to efficiently execute Artificial Neural Networks (ANNs). However, the establishment of RRAM devices in the customer market is delayed by the on-going research to optimize the fabrication process. The contrast between the unsettled underlying hardware and the great interest toward emerging RRAM-based designs resulted in a performance gap between the envisioned RRAM systems and the prototyped ones. In order to transition the RRAM technology from the academic research to real-world scenarios, more circuits need to be designed, implemented, and tested. At the same time, the complexity and cost of modern electronics production impose high reliability and performance standard on the fabricated chip that can only be met by a tight link between the circuit-level validation and any stage of the design development. Unfortunately, the available tools to support the designer at the application- and system-level do not generally offer this cross-layer interface. This work investigates how important the electrical validation can be to guide the designer by comparing the circuital reliability aspects of a traditional routing component and an alternative RRAM-based implementation. Moreover, two different approaches are proposed to bridge the gap between the electric domain and the higher abstraction layers. First, SystemC-AMS is analysed as a viable option to include analogue simulations in Electronic System Level (ESL) evaluation. Several optimization techniques are also proposed to improve the framework performance. Finally, a Pytorch/Spectre tool-chain is implemented to enable circuit-level co-simulation during the testing of ANN models. The tool-chain is validated by considering the end-to-end accuracy for two classification tasks, namely MNIST and CIFAR10 datasets.}, subject = {RRAM; Multiplexer; SystemC; In-Memory Computing; Artificial Neural Network; Resistiver Direktzugriffsspeicher; Rechnen im Speicher; K{\"u}nstliches Neuronales Netzwerk (KNN); Resistive RAM; Routing; Neuronales Netz; Entwicklung; Simulation}, language = {en} } @phdthesis{Petryk2024, author = {Petryk, Dmytro}, title = {Investigation of sensitivity of different logic and memory cells to Laser Fault Injections}, doi = {10.26127/BTUOpen-6664}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-66647}, school = {BTU Cottbus - Senftenberg}, year = {2024}, abstract = {Plenty of semiconductor devices are developed to operate with private data. To guarantee data privacy cryptographic algorithms are used, where the secrecy is based on the used keys. Theoretically, the cryptographic algorithms using keys with recommended lengths are secure. The issue is that a potential attacker can steal the devices and attack in a lab. Physical attacks are usually aimed to perturb normal operation of a device and to extract cryptographic keys, e.g. by means of fault injection (FI). One class of FI attacks exploits the sensitivity of semiconductor devices to light and are performed using a laser as the light source. This work investigates the sensitivity of different logic and memory cells to optical Fault Injection attacks. Front-side attacks against cells manufactured in different IHP technologies were performed using two different red lasers controlled by Riscure software. To reach the repeatability of the experimental results and to increase the comparability of the results with attack results published in literature the setup parameters as well as setting parameters of the Riscure software were experimentally evaluated. Attacks were performed against inverter, NAND, NOR, flip-flop cells from standard libraries, radiation-hard flip-flops based on Junction Isolated Common Gate technique, radiation-tolerant Triple Modular Redundancy registers as well as non-volatile Resistive Random Access Memory (RRAM) cells. The results of attacks against volatile circuits were successful transient bit-set and bit-reset as well permanent stuck-at faults. The results of attacks against RRAM cells were successful in the sense that manipulation of all RRAM logic states was feasible. The faults injected during the performed experiments were repeatable and reproducible. The goal of this work was not only to achieve successful FI but also to determine cell area(s) sensitive to laser illumination. Knowledge about areas sensitive to laser illumination can be used by designers to implement corresponding countermeasure(s) at the initial stage of chip development and is the necessary step to design appropriate countermeasures. For example, metal fillers can be applied as optical obstacles reducing the success of front-side FI attacks, i.e. as a possible low-cost countermeasure. Based on the knowledge of the sensitive cell areas, the placement of the metal fillers can be automated in the future, i.e. the findings given in the work can serve as a basis for a methodology development for improving resistance against optical FI attacks at the initial stage of chip development. Such methodology can be adapted for each chip manufacturing technology.}, subject = {Laser fault injection attacks; Resistive random access memory; Cell sensitive areas; Radiation-hard cells; Countermeasure; Laserfehlerinjektion-Angriffe; Resistiver Direktzugriffsspeicher; Empfindliche Zellbereiche; Strahlungsharte Zellen; Gegenmaßnahme; Halbleiter; Speicherzelle; Datenschutz; Kryptologie; Algorithmus}, language = {en} } @phdthesis{Akhtar2022, author = {Akhtar, Fatima}, title = {Graphene synthesis under Si-CMOS compatible conditions}, doi = {10.26127/BTUOpen-5927}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-59270}, school = {BTU Cottbus - Senftenberg}, year = {2022}, abstract = {Due to the unique electronic band structure, graphene has opened the great potential to extend the functionality of a large variety of graphene-based devices in health and environment, energy storage, or various microelectronic applications, to mention a few. At this point, the implementation of graphene into Silicon (Si) semiconductor technology is strongly dependent on several key challenges. Among them, high-quality and wafer-scale graphene synthesis on CMOS compatible substrates is of the highest importance. Though large-area graphene can be achieved on substrates like copper, platinum, silicon carbide, or single-crystal Ni, however, high growth temperatures, unavailability of large scale, or contamination issues are the main drawbacks of their usage. In this PhD work, 8-inch scale graphene synthesis is attempted on alternative substrates such as epitaxial Germanium on Si and polycrystalline Nickel on Si. To achieve the growth of the highest quality of graphene, this work focuses on the investigations of various nucleation and growth mechanisms, substrate-graphene interfaces, effects of different substrate orientations, and detailed microscopic and macroscopic characterization of the grown films. Finally, it should also be stressed that the experiments in this work were carried out in a standard BiCMOS pilot-line, making this study unique, as its results might directly pave the way to further graphene integration and graphene-based device prototyping in mainstream Si technologies.}, subject = {Graphene; Chemical vapor deposition; Growth; Oxidation; Germanium; Nickel; Graphen; CVD; Wachstum; Oxidation; Graphen; Keimbildung; Wachstum; CVD-Verfahren; Nickel; Germanium}, language = {en} } @phdthesis{Kayser2021, author = {Kayser, Stefan}, title = {The lateral photovoltage scanning method to probe spatial inhomogeneities in semiconductors: a joined numerical and experimental investigation}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-54359}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {The Lateral-Photovoltage-Scanning-Method (LPS) operates well for Si, Ge and Si_{1-x}-Ge_x for an analysis in defect regions below one part per million, where Secondary Ion Mass Spectroscopy (SIMS) or X-Ray Fluorescence (XRF) signals fall below its detection limit. Although LPS is well established since 1999, it is still poorly investigated. We used a computational simulation finite volume (FVM) approach, solving the van-Roosbroeck equations in three dimensions using a MUltifrontal Massively Parallel sparse direct Solver MUMPS. The signal transport is simulated by solving the Maxwell equations in two dimension for different sample geometries. It could be shown that a typical LPS-measurement is distorted due to the samples geometry (except cuboid). This distortion can be simulated, understood and recalculated, as discussed for trapezoidal or cylindrical samples. Also using the signal generation simulation of this measurement technique it can be shown, that the measurement signal is convoluted depending on the inherent minority charge carrier life time reducing the local resolution. An investigation of the local resolution were made using a Gaussian function as the convolution function of this method. A comparison of simulations to real measurements was discussed on silicon samples with boron implantation pattern. In 1955 Tauc already stated that the bulk photovoltaic effect, causative for the LPS measurement set-up, could be used detecting any quantity, which affects the band structure of a semiconductor.As strain is coupled to the conduction and valence band profiles by the deformation potential theory by van-de-Walle, we investigated the possibility to detect strain variations using LPS simulations. For an n-type Si sample with an on-top stressor stripe (silicon-nitride) the strain distribution in Si got calculated by finite elemente simulation (FEM) using solid mechanics module. By directly converting the strain profile to a single conduction and valence band, FVM LPS simulations were performed. It could be shown, that the LPS voltage can be connected to hole traps caused by the conduction and valence band profile. Therefore we can finally conclude, that the LPS measurement set-up is suitable measuring conduction and valence band variations caused by strain.}, subject = {Silicon; Finite-volume simulation; Lateral photovoltage scanning; van Roosbroeck system; Deformation potential theory; Silicium; Finite Volumen Simulation; Lateral Photovoltage Scanning; Deformationspotential Theorie; Deformationstheorie; Finite-Volumen-Methode; Computersimulation; Laserscanner; Silicium}, language = {en} } @phdthesis{SoltaniZarrin2021, author = {Soltani Zarrin, Pouya}, title = {Permittivity biosensor for the recognition of saliva samples of COPD patients using neuromorphic-based machine learning}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-55016}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {Chronic Obstructive Pulmonary Disease (COPD) is an inflammatory lung disease, causing breathing difficulties in patients due to obstructed airflow in lungs. COPD is one of the main leading causes of death worldwide with an annual mortality rate of three million people. Despite the absence of an effective treatment for COPD, an early-stage diagnosis plays a crucial role for the effective management of the disease. However, majority of patients with objective COPD go undiagnosed until late stages of their disease due to the lack of a reliable technology for the recognition and monitoring of COPD in Point-of-Care (PoC). Alternative diagnostic approaches such as the accurate examination of respiratory tract fluids like saliva can address this issue using a portable biosensor in a home-care environment. Nonetheless, the accurate diagnosis of COPD based on this approach is only possible by concurrent consideration of patients demographic--medical parameters. Therefore, Machine Learning (ML) tools are necessary for the comprehensive recognition of COPD in a PoC setting. On the other hand, drawbacks of cloud-based ML techniques for medical applications such as data safety, immerse energy consumption, and enormous computation requirements need to be addressed for this application. Therefore, the objective of this thesis was to develop a ML-equipped system for the management of COPD in a PoC setup. A portable permittivity biosensor was developed in this work and its in-vitro performance was evaluated throughout clinical experiments. ML techniques were applied on biosensor results, demonstrating the significant role of these algorithms for the recognition of COPD. Moreover, developed ML models were deployed on a neuromorphic platform for addressing the shortcomings of cloud-based approaches.}, subject = {BiCMOS permittivity biosensors; COPD management; Saliva characterization; Bioneuromorphics; Machine learning in medicine; BiCMOS Permittivit{\"a}ts-Biosensoren; COPD-Management; Speichelcharakterisierung; Bioneuromorphie; Maschinelles Lernen in der Medizin; Obstruktive Ventilationsst{\"o}rung; Speichel; BICMOS; Biosensor; Maschinelles Lernen}, language = {en} } @phdthesis{MatbaechiEttehad2021, author = {Matbaechi Ettehad, Honeyeh}, title = {Dielectrophoretic manipulation of yeast cells using CMOS integrated microfluidic}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-55315}, school = {BTU Cottbus - Senftenberg}, year = {2021}, abstract = {The rapid detection of infectious diseases is still an unsolved problem since their identification must be carried out either by cultivation or DNA analysis in a laboratory. The development of point-of-care (PoC) is a current development trend that requires further technological impulses to produce reliable and cost-effective systems. By miniaturizing and integrating microfluidic and electronic components, the advantages of electronic methods can be transferred to the field of PoC testing. The combination of complementary metal-oxide-semiconductor (CMOS) technology with microfluidic platforms allowed the development of fully functional sample-to-result LoC setups, which served the portability of the device even out of the laboratory or hospitals. CMOS-based LoC device can control and manage the data from sensors, microfluidics, and actuators. Dielectrophoresis (DEP) is a non-destructive and non-invasive method promising to be used in PoC medical applications. Utilizing MEMS technology and fabrication of microelectrodes allow DEP to be applied in biomedical applications such as cell manipulation and separation with high speed, sensitivity and without any labeling. Cell detection and separation occupy an important place in diagnostics of viral and infectious diseases such as Influenza and COVID-19. Therefore, rapid, sensitive, and automated LoC devices are needed to detect such diseases. Starting from this point of view, manipulating the cells as a way to detect them using DEP was decided as the main objective of the thesis. This work aimed at developing a miniaturized CMOS integrated silicon microfluidic device, in line with a standard CMOS procedure, for characterization and manipulation of live and dead yeast cells using the DEP technique. Understanding the relationship between the microelectrode's geometry and the magnitude of DEP force, the microfluidic devices can be designed to produce the most effective DEP implication on biological samples. In this work, interdigitated electrode arrays (IDEs) were used to manipulate the cells. This microelectrode was primarily used to detect microorganisms in a solution, based on the measurement of the variation of the dielectric constant by the concentration of the microorganisms. Therefore, finite element simulations were performed to optimize this microelectrode and adapt it to our application. Thus, the IDEs were optimized as a function of finger width and spacing between adjacent fingers. One of the most serious matters related to DEP-based microfluidic devices is that the DEP spectra of the targeted cell should precisely be known. Therefore, the DEP spectrum analysis of various cell suspensions with different medium conductivities was studied comprehensively by finite element simulation and experimentally. This study presented an optimized trapping platform for both detection and separation applications in terms of electrode dimension and electrical parameters.}, subject = {Dielectrophoresis (DEP); Yeast cell; Cell manipulation; Interdigitated electrodes (IDEs); CMOS-integrated microfluidic Lab-on-a-chip; Dielektrophorese (DEP); Hefezelle; Zellmanipulation; Interdigitalelektroden (IDEs); CMOS-integriertes mikrofluidisches Lab-on-a-chip; CMOS; Lab on a Chip; Dielektrophorese; Saccharomyces cerevisiae; Mikrofluidik; Biomedizinische Technik}, language = {en} } @phdthesis{Mahmoodinezhad2022, author = {Mahmoodinezhad, Ali}, title = {Atomic layer deposition and characterization of metal oxide thin films}, doi = {10.26127/BTUOpen-6134}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-61343}, school = {BTU Cottbus - Senftenberg}, year = {2022}, abstract = {This thesis describes low temperature growth of wide band gap metal oxide thin films deposited by thermal (T-) and plasma-enhanced (PE-) atomic layer deposition (ALD) techniques in which high quality materials are grown with atomic level precision. Metal oxides are extensively investigated due to their exceptional physical and chemical properties, including relatively wide band gap, high dielectric constant and high thermal stability. This variety of properties results in a wide range of different applications. Thin films of indium oxide (InOx), gallium oxide (GaOx), zinc oxide (ZnOx), and quaternary InOx/GaOx/ZnOx (IGZO), in addition to the well-known aluminum oxide (AlOx), and the catalyst cerium oxide (CeOx), have proven to be superior candidates for many applications; from microelectronics and optoelectronics to gas sensor devices. The demanding requirements of low-temperature deposition processes for thermal sensitive substrates, which include high layer homogeneity and conformality over large areas, makes ALD a pioneer deposition technique. Although many oxides have been grown by TALD and PEALD, the deposition of wide band gap oxides at low temperatures are rarely reported and/or being investigated. In this work, the deposition method of the individual binary oxide films and combining the respective binary processes into the developed super-cycle growth of quaternary compound have been investigated at relatively low-temperatures by TALD and PEALD. Besides, the growth characteristics and chemical properties of the deposited films were evaluated by in-situ and ex-situ characterization techniques such as spectroscopic ellipsometry (SE) and X-ray photoelectron spectroscopy (XPS), where the influence of ALD process parameters on the growth mechanism and films composition are discussed in detail for any potential applications.}, subject = {Thermal atomic layer deposition; Plasma-enhanced atomic layer deposition; Indium gallium zinc oxide; Aluminum oxide; Cerium oxide; Thermische Atomlagenabscheidung; Plasmaunterst{\"u}tzte Atomlagenabscheidung; IGZO; AlOx; CeOx; Tieftemperatur; Atomlagenabscheidung; Beschichtung; Metallschicht; D{\"u}nne Schicht; Aluminiumoxide; Ceroxide; Indiumoxide}, language = {en} }