@phdthesis{Tetzner2023, author = {Tetzner, Henriette}, title = {Investigations of the electrical activity of defects in group IV and group III-N alloys integrated on Si substrates}, doi = {10.26127/BTUOpen-6681}, url = {http://nbn-resolving.de/urn:nbn:de:kobv:co1-opus4-66819}, school = {BTU Cottbus - Senftenberg}, year = {2023}, abstract = {The hetero-integration of group IV and III-V epitaxial layers on silicon (Si) substrates enables novel devices for optoelectronic and high-power applications. However, lattice and thermal mismachtes lead to an unavoidable formation of defects in hetero-epitaxy. The consideration of these defects is important in semiconductor devices as they affect material properties and impair the device performances. Besides the structural characterization of the unintentional introduced defects and the question of it's origin, it is essential to evaluate their electrical activity in order to describe their impact on the device performance. This work explores the electrical activity of threading dislocations (TDs) in Ge-rich SiGe heterostructures integrated on Si substrates as well as the electrical active defects introduced by the growth of aluminium-nitride (AlN) seed layers for the integration of gallium-nitride (GaN) on Si substrates. I demonstrated a defect-related p-type conductivity of intrinsically grown Si ₀ ̣₀₆Ge ₀ ̣₉₄/Ge that reaffirms previous work of similar intrinsic Ge-based material. Moreover, I detailed the threading dislocation related leakage currents in rectifying devices, revealing a power law dependence on the threading dislocation density (TDD). By a variation of temperature I determined the dominant mechanism of transport of this leakage currents in different temperature regimes, for which I suggested possible interactions with TD related defect states. Through the reduction of leakage currents in the fabricated MOS capacitors I was able to examine an effective carrier concentration of 5-6x10¹⁵cm⁻³ in the nominally intrinsic Si ₀ ̣₀₆Ge ₀ ̣₉₄ epitaxial layer, which decreases down to 1x10¹⁵cm⁻³in the Ge buffer underneath. By applying deep level transient spectroscopy (DLTS) I found one dominant hole trap at mid-gap position confirming the presence of an TD-related effective generation-recombination center. In addition, I investigated the hole trapping kinetics of this defect level and associated it with point defects that are trapped in the strain field around threading dislocations. I obtained insights into defect formation in the Si substrate and at the AlN/Si interface in dependence of the AlN growth temperature. A low temperature growth step prevented a deep in-diffusion of Al atoms into the Si substrate with simultaneous increase of the maximal p-type doping in the vicinity of the AlN/Si interface. Furthermore, I found a bulk hole trap inside the Si substrate at mid-gap position that showed an increase in density by applying a low temperature growth step. In contrast, the defect states at the AlN/Si interface decreased when a low temperature growth step was applied, in comparison to AlN layers grown at continuous high temperatures.}, subject = {Silicon-germanium; Extended defects; Electrical active defects; Silizium-Germanium; Durchstoßversetzungen; Elektrisch aktive Defekte; DLTS; C-V; Siiicium; Germanium; MOS; Gitterbaufehler; Elektrischer Durchbruch}, language = {en} }